diff mbox series

tcg: Fix tcg gen for vectorized absolute value

Message ID 20200812223110.229-1-steplong@quicinc.com
State New
Headers show
Series tcg: Fix tcg gen for vectorized absolute value | expand

Commit Message

Stephen Long Aug. 12, 2020, 10:31 p.m. UTC
---
 tcg/tcg-op-gvec.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

qemu was generating buggy tcg for arm64's vectorized absolute value
insn when the machine didn't support avx insns.

Subtracting a mask of -1 for each negative element doesn't
add 1 to each negative element. For example, subtracting a mask of
0xffff_ffff_ffff_ffff only adds one to the low byte because
~0xffff_ffff_ffff_ffff + 1 is just 1, instead of 0x0101_0101_0101_0101.

Comments

no-reply@patchew.org Aug. 13, 2020, 11:40 a.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20200812223110.229-1-steplong@quicinc.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20200812223110.229-1-steplong@quicinc.com
Subject: [PATCH] tcg: Fix tcg gen for vectorized absolute value

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
723ca64 tcg: Fix tcg gen for vectorized absolute value

=== OUTPUT BEGIN ===
ERROR: Missing Signed-off-by: line(s)

total: 1 errors, 0 warnings, 15 lines checked

Commit 723ca64a2408 (tcg: Fix tcg gen for vectorized absolute value) has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200812223110.229-1-steplong@quicinc.com/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com
diff mbox series

Patch

diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index 3707c0e..793d4ba 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec.c
@@ -2264,12 +2264,13 @@  static void gen_absv_mask(TCGv_i64 d, TCGv_i64 b, unsigned vece)
     tcg_gen_muli_i64(t, t, (1 << nbit) - 1);
 
     /*
-     * Invert (via xor -1) and add one (via sub -1).
+     * Invert (via xor -1) and add one.
      * Because of the ordering the msb is cleared,
      * so we never have carry into the next element.
      */
     tcg_gen_xor_i64(d, b, t);
-    tcg_gen_sub_i64(d, d, t);
+    tcg_gen_andi_i64(t, t, dup_const(vece, 1));
+    tcg_gen_add_i64(d, d, t);
 
     tcg_temp_free_i64(t);
 }