@@ -169,6 +169,7 @@ void helper_cp1_putc(target_ulong regval)
bool uc32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
+ qemu_mutex_lock_iothread();
if (interrupt_request & CPU_INTERRUPT_HARD) {
UniCore32CPU *cpu = UNICORE32_CPU(cs);
CPUUniCore32State *env = &cpu->env;
@@ -176,8 +177,10 @@ bool uc32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
if (!(env->uncached_asr & ASR_I)) {
cs->exception_index = UC32_EXCP_INTR;
uc32_cpu_do_interrupt(cs);
+ qemu_mutex_unlock_iothread();
return true;
}
}
+ qemu_mutex_unlock_iothread();
return false;
}
@@ -81,6 +81,10 @@ void uc32_cpu_do_interrupt(CPUState *cs)
CPUUniCore32State *env = &cpu->env;
uint32_t addr;
int new_mode;
+ bool bql = !qemu_mutex_iothread_locked();
+ if (bql) {
+ qemu_mutex_lock_iothread();
+ }
switch (cs->exception_index) {
case UC32_EXCP_PRIV:
@@ -118,6 +122,9 @@ void uc32_cpu_do_interrupt(CPUState *cs)
env->regs[30] = env->regs[31];
env->regs[31] = addr;
cpu_interrupt_request_or(cs, CPU_INTERRUPT_EXITTB);
+ if (bql) {
+ qemu_mutex_unlock_iothread();
+ }
}
static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address,
This is part of a series of changes to remove the implied BQL from the common code of cpu_handle_interrupt and cpu_handle_exception. As part of removing the implied BQL from the common code, we are pushing the BQL holding down into the per-arch implementation functions of do_interrupt and cpu_exec_interrupt. The purpose of this set of changes is to set the groundwork so that an arch could move towards removing the BQL from the cpu_handle_interrupt/exception paths. This approach was suggested by Paolo Bonzini. For reference, here are two key posts in the discussion, explaining the reasoning/benefits of this approach. https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg08731.html https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg00044.html Signed-off-by: Robert Foley <robert.foley@linaro.org> --- target/unicore32/helper.c | 3 +++ target/unicore32/softmmu.c | 7 +++++++ 2 files changed, 10 insertions(+)