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[PULL,08/53] target/i386: set SSE FTZ in correct floating-point state

Message ID 20200706164155.24696-9-pbonzini@redhat.com
State New
Headers show
Series [PULL,01/53] tcg/svm: use host cr4 during NPT page table walk | expand

Commit Message

Paolo Bonzini July 6, 2020, 4:41 p.m. UTC 
From: Joseph Myers <joseph@codesourcery.com>

The code to set floating-point state when MXCSR changes calls
set_flush_to_zero on &env->fp_status, so affecting the x87
floating-point state rather than the SSE state.  Fix to call it for
&env->sse_status instead.

Signed-off-by: Joseph Myers <joseph@codesourcery.com>
Message-Id: <alpine.DEB.2.21.2006252357170.3832@digraph.polyomino.org.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/fpu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index 71cec3962f..ec5b9db8b9 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -2972,7 +2972,7 @@  void update_mxcsr_status(CPUX86State *env)
     set_flush_inputs_to_zero((mxcsr & SSE_DAZ) ? 1 : 0, &env->sse_status);
 
     /* set flush to zero */
-    set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);
+    set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status);
 }
 
 void helper_ldmxcsr(CPUX86State *env, uint32_t val)