diff mbox series

[PULL,v2,01/12] target/sparc: Translate flushw opcode

Message ID 20200702152710.84602-2-laurent@vivier.eu
State New
Headers show
Series [PULL,v2,01/12] target/sparc: Translate flushw opcode | expand

Commit Message

Laurent Vivier July 2, 2020, 3:26 p.m. UTC 
From: Giuseppe Musacchio <thatlemon@gmail.com>

The ifdef logic should unconditionally compile in the `xop == 0x2b` case
when targeting sparc64.

Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200625091204.3186186-2-laurent@vivier.eu>
---
 target/sparc/translate.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 9416a551cf46..1a4efd4ed665 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -3663,6 +3663,8 @@  static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
 #endif
                 gen_store_gpr(dc, rd, cpu_tmp0);
                 break;
+#endif
+#if defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY)
             } else if (xop == 0x2b) { /* rdtbr / V9 flushw */
 #ifdef TARGET_SPARC64
                 gen_helper_flushw(cpu_env);