@@ -33,7 +33,14 @@
#define NR_SAMPLES 10
-static unsigned int pmu_version;
+struct pmu {
+ unsigned int version;
+ unsigned int nb_implemented_counters;
+ uint32_t pmcr_ro;
+};
+
+static struct pmu pmu;
+
#if defined(__arm__)
#define ID_DFR0_PERFMON_SHIFT 24
#define ID_DFR0_PERFMON_MASK 0xf
@@ -242,7 +249,7 @@ static bool check_cpi(int cpi)
static void pmccntr64_test(void)
{
#ifdef __arm__
- if (pmu_version == 0x3) {
+ if (pmu.version == 0x3) {
if (ERRATA(9e3f7a296940)) {
write_sysreg(0xdead, PMCCNTR64);
report(read_sysreg(PMCCNTR64) == 0xdead, "pmccntr64");
@@ -257,18 +264,24 @@ static bool pmu_probe(void)
{
uint32_t pmcr;
- pmu_version = get_pmu_version();
- if (pmu_version == 0 || pmu_version == 0xf)
+ pmu.version = get_pmu_version();
+ if (pmu.version == 0 || pmu.version == 0xf)
return false;
- report_info("PMU version: %d", pmu_version);
+ report_info("PMU version: %d", pmu.version);
pmcr = get_pmcr();
- report_info("PMU implementer/ID code/counters: %#x(\"%c\")/%#x/%d",
+ report_info("PMU implementer/ID code: %#x(\"%c\")/%#x",
(pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK,
((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ',
- (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK,
- (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK);
+ (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK);
+
+ /* store read-only and RES0 fields of the PMCR bottom-half*/
+ pmu.pmcr_ro = pmcr & 0xFFFFFF00;
+ pmu.nb_implemented_counters =
+ (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK;
+ report_info("Implements %d event counters",
+ pmu.nb_implemented_counters);
return true;
}