diff mbox series

[1/3] target/i386: Rename CORE_CAPABILITY to CORE_CAPABILITIES

Message ID 20200323025658.4540-2-xiaoyao.li@intel.com
State New
Headers show
Series Misc patches for core_capabilites and split lock detection | expand

Commit Message

Xiaoyao Li March 23, 2020, 2:56 a.m. UTC 
Intel SDM updates the name of MSR CORE_CAPABILITY to CORE_CAPABILITIES,
so updating it QEMU.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
 target/i386/cpu.c | 12 ++++++------
 target/i386/cpu.h |  6 +++---
 target/i386/kvm.c |  6 +++---
 3 files changed, 12 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 34b511f078e5..1de7f3cd533e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1216,7 +1216,7 @@  static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             .index = MSR_IA32_ARCH_CAPABILITIES,
         },
     },
-    [FEAT_CORE_CAPABILITY] = {
+    [FEAT_CORE_CAPABILITIES] = {
         .type = MSR_FEATURE_WORD,
         .feat_names = {
             NULL, NULL, NULL, NULL,
@@ -1229,7 +1229,7 @@  static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             NULL, NULL, NULL, NULL,
         },
         .msr = {
-            .index = MSR_IA32_CORE_CAPABILITY,
+            .index = MSR_IA32_CORE_CAPABILITIES,
         },
     },
 
@@ -1406,8 +1406,8 @@  static FeatureDep feature_dependencies[] = {
         .to = { FEAT_ARCH_CAPABILITIES,     ~0ull },
     },
     {
-        .from = { FEAT_7_0_EDX,             CPUID_7_0_EDX_CORE_CAPABILITY },
-        .to = { FEAT_CORE_CAPABILITY,       ~0ull },
+        .from = { FEAT_7_0_EDX,             CPUID_7_0_EDX_CORE_CAPABILITIES },
+        .to = { FEAT_CORE_CAPABILITIES,     ~0ull },
     },
     {
         .from = { FEAT_1_ECX,               CPUID_EXT_VMX },
@@ -3709,8 +3709,8 @@  static X86CPUDefinition builtin_x86_defs[] = {
         .features[FEAT_7_0_EDX] =
             CPUID_7_0_EDX_SPEC_CTRL |
             CPUID_7_0_EDX_ARCH_CAPABILITIES | CPUID_7_0_EDX_SPEC_CTRL_SSBD |
-            CPUID_7_0_EDX_CORE_CAPABILITY,
-        .features[FEAT_CORE_CAPABILITY] =
+            CPUID_7_0_EDX_CORE_CAPABILITIES,
+        .features[FEAT_CORE_CAPABILITIES] =
             MSR_CORE_CAP_SPLIT_LOCK_DETECT,
         /*
          * Missing: XSAVES (not supported by some Linux versions,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 60d797d5941f..f6c54412ba5e 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -349,7 +349,7 @@  typedef enum X86Seg {
 #define MSR_VIRT_SSBD                   0xc001011f
 #define MSR_IA32_PRED_CMD               0x49
 #define MSR_IA32_UCODE_REV              0x8b
-#define MSR_IA32_CORE_CAPABILITY        0xcf
+#define MSR_IA32_CORE_CAPABILITIES      0xcf
 
 #define MSR_IA32_ARCH_CAPABILITIES      0x10a
 #define ARCH_CAP_TSX_CTRL_MSR		(1<<7)
@@ -526,7 +526,7 @@  typedef enum FeatureWord {
     FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
     FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
     FEAT_ARCH_CAPABILITIES,
-    FEAT_CORE_CAPABILITY,
+    FEAT_CORE_CAPABILITIES,
     FEAT_VMX_PROCBASED_CTLS,
     FEAT_VMX_SECONDARY_CTLS,
     FEAT_VMX_PINBASED_CTLS,
@@ -777,7 +777,7 @@  typedef uint64_t FeatureWordArray[FEATURE_WORDS];
 /* Arch Capabilities */
 #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29)
 /* Core Capability */
-#define CPUID_7_0_EDX_CORE_CAPABILITY   (1U << 30)
+#define CPUID_7_0_EDX_CORE_CAPABILITIES (1U << 30)
 /* Speculative Store Bypass Disable */
 #define CPUID_7_0_EDX_SPEC_CTRL_SSBD    (1U << 31)
 
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 69eb43d796e6..6888cb7caeae 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -2051,7 +2051,7 @@  static int kvm_get_supported_msrs(KVMState *s)
             case MSR_IA32_ARCH_CAPABILITIES:
                 has_msr_arch_capabs = true;
                 break;
-            case MSR_IA32_CORE_CAPABILITY:
+            case MSR_IA32_CORE_CAPABILITIES:
                 has_msr_core_capabs = true;
                 break;
             case MSR_IA32_VMX_VMFUNC:
@@ -2696,8 +2696,8 @@  static void kvm_init_msrs(X86CPU *cpu)
     }
 
     if (has_msr_core_capabs) {
-        kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITY,
-                          env->features[FEAT_CORE_CAPABILITY]);
+        kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITIES,
+                          env->features[FEAT_CORE_CAPABILITIES]);
     }
 
     if (has_msr_ucode_rev) {