From patchwork Wed Mar 18 10:11:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharat Bhushan X-Patchwork-Id: 1257398 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=marvell.com header.i=@marvell.com header.a=rsa-sha256 header.s=pfpt0818 header.b=UiwThwlR; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48j5T94JYRz9sQx for ; Wed, 18 Mar 2020 21:13:01 +1100 (AEDT) Received: from localhost ([::1]:47942 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jEVh5-0002Lq-Em for incoming@patchwork.ozlabs.org; Wed, 18 Mar 2020 06:12:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37225) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jEVgg-0002FD-Q6 for qemu-devel@nongnu.org; Wed, 18 Mar 2020 06:12:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jEVgf-0004g6-Pf for qemu-devel@nongnu.org; Wed, 18 Mar 2020 06:12:34 -0400 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:12606) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jEVgf-0004fj-Kg; Wed, 18 Mar 2020 06:12:33 -0400 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 02IABnOe030625; Wed, 18 Mar 2020 03:12:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=w1PjheBBbpwXuVOh06nYaUHWFHP75aU7PlNsOsBVK/M=; b=UiwThwlRdc9P2BQsawOW/7Ikty4/+xO0V7mNB9v4f0nP9lXVaAAyr8RVLArJ13swtCZZ 7MZUn3U579LjiGc5MUrj/wz183R7j+PzWmss9Hr/UHWxpjCa1QNC8X2sp7uxx2QPgbvf MU38AUTb2/dEWLfwQiC4DL0Gkmwkrd/h7oVz8/H1+ZTqcMeBJ8UMhZbLLJQw6vWilFn6 gpKzUaiP8lsakrhVgKJb/VoaKPwXMC9wgZPsS0RI93NVh/H5dojssfTnbJ7BIcPofoBD TICb5KM9o/OkhoLqjl2B+IuCVMxeNGunE71mUfyUhslng2JXoMO0OwKV341q2a5YwBOM 3g== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2yu9rp9tv2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 18 Mar 2020 03:12:31 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Mar 2020 03:12:29 -0700 Received: from bbhushan2.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 18 Mar 2020 03:12:25 -0700 From: Bharat Bhushan To: , , , , , , , , , , , , , Subject: [PATCH v8 4/8] virtio-iommu: set supported page size mask Date: Wed, 18 Mar 2020 15:41:55 +0530 Message-ID: <20200318101159.8767-5-bbhushan2@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200318101159.8767-1-bbhushan2@marvell.com> References: <20200318101159.8767-1-bbhushan2@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-18_04:2020-03-18, 2020-03-18 signatures=0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 67.231.156.173 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bharat Bhushan Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add optional interface to set page size mask. Currently this is set global configuration and not per endpoint. Signed-off-by: Bharat Bhushan --- v7->v8: - new patch hw/virtio/virtio-iommu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 4cee8083bc..c00a55348d 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -650,6 +650,15 @@ static gint int_cmp(gconstpointer a, gconstpointer b, gpointer user_data) return (ua > ub) - (ua < ub); } +static void virtio_iommu_set_page_size_mask(IOMMUMemoryRegion *mr, + uint64_t page_size_mask) +{ + IOMMUDevice *sdev = container_of(mr, IOMMUDevice, iommu_mr); + VirtIOIOMMU *s = sdev->viommu; + + s->config.page_size_mask = page_size_mask; +} + static void virtio_iommu_device_realize(DeviceState *dev, Error **errp) { VirtIODevice *vdev = VIRTIO_DEVICE(dev); @@ -865,6 +874,7 @@ static void virtio_iommu_memory_region_class_init(ObjectClass *klass, IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); imrc->translate = virtio_iommu_translate; + imrc->iommu_set_page_size_mask = virtio_iommu_set_page_size_mask; } static const TypeInfo virtio_iommu_info = {