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[83.42.66.191]) by smtp.gmail.com with ESMTPSA id j39sm12580913wre.11.2020.03.15.16.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Mar 2020 16:57:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 07/12] target/riscv/cpu: Restrict CPU migration to system-mode Date: Mon, 16 Mar 2020 00:57:11 +0100 Message-Id: <20200315235716.28448-8-philmd@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200315235716.28448-1-philmd@redhat.com> References: <20200315235716.28448-1-philmd@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Eduardo Habkost , Sagar Karandikar , Bastian Koppelmann , Cornelia Huck , Richard Henderson , Laurent Vivier , qemu-s390x@nongnu.org, Alistair Francis , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Palmer Dabbelt , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c0b7023100..b59e09209e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -475,10 +475,12 @@ static void riscv_cpu_init(Object *obj) cpu_set_cpustate_pointers(cpu); } +#ifndef CONFIG_USER_ONLY static const VMStateDescription vmstate_riscv_cpu = { .name = "cpu", .unmigratable = 1, }; +#endif static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true), @@ -534,13 +536,13 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->do_transaction_failed = riscv_cpu_do_transaction_failed; cc->do_unaligned_access = riscv_cpu_do_unaligned_access; cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; + /* For now, mark unmigratable: */ + cc->vmsd = &vmstate_riscv_cpu; #endif #ifdef CONFIG_TCG cc->tcg_initialize = riscv_translate_init; cc->tlb_fill = riscv_cpu_tlb_fill; #endif - /* For now, mark unmigratable: */ - cc->vmsd = &vmstate_riscv_cpu; device_class_set_props(dc, riscv_cpu_properties); }