| Message ID | 20200211173726.22541-4-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm: Implement ARMv8.1-PMU and ARMv8.4-PMU | expand |
On 2/11/20 9:37 AM, Peter Maydell wrote: > Instead of open-coding "ARM_FEATURE_AARCH64 ? aa64_predinv: aa32_predinv", > define and use an any_predinv isar_feature test function. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/arm/cpu.h | 5 +++++ > target/arm/helper.c | 9 +-------- > 2 files changed, 6 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 2/11/20 6:37 PM, Peter Maydell wrote: > Instead of open-coding "ARM_FEATURE_AARCH64 ? aa64_predinv: aa32_predinv", > define and use an any_predinv isar_feature test function. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/arm/cpu.h | 5 +++++ > target/arm/helper.c | 9 +-------- > 2 files changed, 6 insertions(+), 8 deletions(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index ac4b7950166..b1f3ecfd942 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -3719,6 +3719,11 @@ static inline bool isar_feature_any_fp16(const ARMISARegisters *id) > return isar_feature_aa64_fp16(id) || isar_feature_aa32_fp16_arith(id); > } > > +static inline bool isar_feature_any_predinv(const ARMISARegisters *id) > +{ > + return isar_feature_aa64_predinv(id) || isar_feature_aa32_predinv(id); > +} > + > /* > * Forward to the above feature tests given an ARMCPU pointer. > */ > diff --git a/target/arm/helper.c b/target/arm/helper.c > index ddfd0183d98..bf083c369fc 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -7116,14 +7116,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) > #endif /*CONFIG_USER_ONLY*/ > #endif > > - /* > - * While all v8.0 cpus support aarch64, QEMU does have configurations > - * that do not set ID_AA64ISAR1, e.g. user-only qemu-arm -cpu max, > - * which will set ID_ISAR6. > - */ > - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) > - ? cpu_isar_feature(aa64_predinv, cpu) > - : cpu_isar_feature(aa32_predinv, cpu)) { > + if (cpu_isar_feature(any_predinv, cpu)) { Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> > define_arm_cp_regs(cpu, predinv_reginfo); > } > } >
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index ac4b7950166..b1f3ecfd942 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3719,6 +3719,11 @@ static inline bool isar_feature_any_fp16(const ARMISARegisters *id) return isar_feature_aa64_fp16(id) || isar_feature_aa32_fp16_arith(id); } +static inline bool isar_feature_any_predinv(const ARMISARegisters *id) +{ + return isar_feature_aa64_predinv(id) || isar_feature_aa32_predinv(id); +} + /* * Forward to the above feature tests given an ARMCPU pointer. */ diff --git a/target/arm/helper.c b/target/arm/helper.c index ddfd0183d98..bf083c369fc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7116,14 +7116,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) #endif /*CONFIG_USER_ONLY*/ #endif - /* - * While all v8.0 cpus support aarch64, QEMU does have configurations - * that do not set ID_AA64ISAR1, e.g. user-only qemu-arm -cpu max, - * which will set ID_ISAR6. - */ - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) - ? cpu_isar_feature(aa64_predinv, cpu) - : cpu_isar_feature(aa32_predinv, cpu)) { + if (cpu_isar_feature(any_predinv, cpu)) { define_arm_cp_regs(cpu, predinv_reginfo); } }
Instead of open-coding "ARM_FEATURE_AARCH64 ? aa64_predinv: aa32_predinv", define and use an any_predinv isar_feature test function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 5 +++++ target/arm/helper.c | 9 +-------- 2 files changed, 6 insertions(+), 8 deletions(-)