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[v6,12/22] target/arm: default SVE length to 64 bytes for linux-user

Message ID 20200205171031.22582-13-alex.bennee@linaro.org
State New
Headers show
Series gdbstub refactor and SVE support | expand

Commit Message

Alex Bennée Feb. 5, 2020, 5:10 p.m. UTC 
The Linux kernel chooses the default of 64 bytes for SVE registers on
the basis that it is the largest size on known hardware that won't
grow the signal frame. We still honour the sve-max-vq property and
userspace can expand the number of lanes by calling PR_SVE_SET_VL.

This should not make any difference to SVE enabled software as the SVE
is of course vector length agnostic.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

---
v2
  - tweak zcr_el[1] instead
---
 target/arm/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Richard Henderson Feb. 6, 2020, 11:19 a.m. UTC | #1 
On 2/5/20 5:10 PM, Alex Bennée wrote:
> -        /* with maximum vector length */
> +        /* with reasonable vector length */
>          env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ?
> -                             cpu->sve_max_vq - 1 : 0;
> +            MIN(cpu->sve_max_vq - 1, 3) : 0;
>          env->vfp.zcr_el[2] = env->vfp.zcr_el[1];
>          env->vfp.zcr_el[3] = env->vfp.zcr_el[1];

Let's reorg this to

    if (cpu_isar_feature(aa64_sve, cpu)) {
        env->vfp.zcr_el[1] = MIN(cpu->sve_max_vq - 1, 3);
        env->vfp.zcr_el[2] = cpu->sve_max_vq - 1;
        env->vfp.zcr_el[3] = cpu->sve_max_vq - 1;
    }

Using the MIN setting on el2 and el3 was wrong, as it meant that we could *not*
increase the setting later with PR_SVE_SET_VL, at least not without changes to
linux-user...


r~
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f86e71a260d..e5eac981b0a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -199,9 +199,9 @@  static void arm_cpu_reset(CPUState *s)
         /* and to the SVE instructions */
         env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3);
         env->cp15.cptr_el[3] |= CPTR_EZ;
-        /* with maximum vector length */
+        /* with reasonable vector length */
         env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ?
-                             cpu->sve_max_vq - 1 : 0;
+            MIN(cpu->sve_max_vq - 1, 3) : 0;
         env->vfp.zcr_el[2] = env->vfp.zcr_el[1];
         env->vfp.zcr_el[3] = env->vfp.zcr_el[1];
         /*