@@ -404,10 +404,7 @@ using Makefile.target for the build rules.
- rules.mak
This file provides the generic helper rules for invoking build tools, in
-particular the compiler and linker. This also contains the magic (hairy)
-'unnest-vars' function which is used to merge the variable definitions
-from all Makefile.objs in the source tree down into the main Makefile
-context.
+particular the compiler and linker.
- default-configs/*.mak
@@ -161,15 +161,6 @@ define install-prog
$(if $(STRIP),$(STRIP) $(foreach T,$1,"$2/$(notdir $T)"),)
endef
-# find-in-path
-# Usage: $(call find-in-path, prog)
-# Looks in the PATH if the argument contains no slash, else only considers one
-# specific directory. Returns an # empty string if the program doesn't exist
-# there.
-find-in-path = $(if $(findstring /, $1), \
- $(wildcard $1), \
- $(wildcard $(patsubst %, %/$1, $(subst :, ,$(PATH)))))
-
# Logical functions (for operating on y/n values like CONFIG_FOO vars)
# Inputs to these must be either "y" (true) or "n" or "" (both false)
# Output is always either "y" or "n".
@@ -208,173 +199,3 @@ clean: clean-timestamp
# will delete the target of a rule if commands exit with a nonzero exit status
.DELETE_ON_ERROR:
-
-# save-vars
-# Usage: $(call save-vars, vars)
-# Save each variable $v in $vars as save-vars-$v, save their object's
-# variables, then clear $v. saved-vars-$v contains the variables that
-# where saved for the objects, in order to speedup load-vars.
-define save-vars
- $(foreach v,$1,
- $(eval save-vars-$v := $(value $v))
- $(eval saved-vars-$v := $(foreach o,$($v), \
- $(if $($o-cflags), $o-cflags $(eval save-vars-$o-cflags := $($o-cflags))$(eval $o-cflags := )) \
- $(if $($o-libs), $o-libs $(eval save-vars-$o-libs := $($o-libs))$(eval $o-libs := )) \
- $(if $($o-objs), $o-objs $(eval save-vars-$o-objs := $($o-objs))$(eval $o-objs := ))))
- $(eval $v := ))
-endef
-
-# load-vars
-# Usage: $(call load-vars, vars, add_var)
-# Load the saved value for each variable in @vars, and the per object
-# variables.
-# Append @add_var's current value to the loaded value.
-define load-vars
- $(eval $2-new-value := $(value $2))
- $(foreach v,$1,
- $(eval $v := $(value save-vars-$v))
- $(foreach o,$(saved-vars-$v),
- $(eval $o := $(save-vars-$o)) $(eval save-vars-$o := ))
- $(eval save-vars-$v := )
- $(eval saved-vars-$v := ))
- $(eval $2 := $(value $2) $($2-new-value))
-endef
-
-# fix-paths
-# Usage: $(call fix-paths, obj_path, src_path, vars)
-# Add prefix @obj_path to all objects in @vars, and add prefix @src_path to all
-# directories in @vars.
-define fix-paths
- $(foreach v,$3,
- $(foreach o,$($v),
- $(if $($o-libs),
- $(eval $1$o-libs := $($o-libs)))
- $(if $($o-cflags),
- $(eval $1$o-cflags := $($o-cflags)))
- $(if $($o-objs),
- $(eval $1$o-objs := $(addprefix $1,$($o-objs)))))
- $(eval $v := $(addprefix $1,$(filter-out %/,$($v))) \
- $(addprefix $2,$(filter %/,$($v)))))
-endef
-
-# unnest-var-recursive
-# Usage: $(call unnest-var-recursive, obj_prefix, vars, var)
-#
-# Unnest @var by including subdir Makefile.objs, while protect others in @vars
-# unchanged.
-#
-# @obj_prefix is the starting point of object path prefix.
-#
-define unnest-var-recursive
- $(eval dirs := $(sort $(filter %/,$($3))))
- $(eval $3 := $(filter-out %/,$($3)))
- $(foreach d,$(dirs:%/=%),
- $(call save-vars,$2)
- $(eval obj := $(if $1,$1/)$d)
- $(eval -include $(SRC_PATH)/$d/Makefile.objs)
- $(call fix-paths,$(if $1,$1/)$d/,$d/,$2)
- $(call load-vars,$2,$3)
- $(call unnest-var-recursive,$1,$2,$3))
-endef
-
-# unnest-vars
-# Usage: $(call unnest-vars, obj_prefix, vars)
-#
-# @obj_prefix: object path prefix, can be empty, or '..', etc. Don't include
-# ending '/'.
-#
-# @vars: the list of variable names to unnest.
-#
-# This macro will scan subdirectories's Makefile.objs, include them, to build
-# up each variable listed in @vars.
-#
-# Per object and per module cflags and libs are saved with relative path fixed
-# as well, those variables include -libs, -cflags and -objs. Items in -objs are
-# also fixed to relative path against SRC_PATH plus the prefix @obj_prefix.
-#
-# All nested variables postfixed by -m in names are treated as DSO variables,
-# and will be built as modules, if enabled.
-#
-# A simple example of the unnest:
-#
-# obj_prefix = ..
-# vars = hot cold
-# hot = fire.o sun.o season/
-# cold = snow.o water/ season/
-#
-# Unnest through a faked source directory structure:
-#
-# SRC_PATH
-# ├── water
-# │ └── Makefile.objs──────────────────┐
-# │ │ hot += steam.o │
-# │ │ cold += ice.mo │
-# │ │ ice.mo-libs := -licemaker │
-# │ │ ice.mo-objs := ice1.o ice2.o │
-# │ └──────────────────────────────┘
-# │
-# └── season
-# └── Makefile.objs──────┐
-# │ hot += summer.o │
-# │ cold += winter.o │
-# └──────────────────┘
-#
-# In the end, the result will be:
-#
-# hot = ../fire.o ../sun.o ../season/summer.o
-# cold = ../snow.o ../water/ice.mo ../season/winter.o
-# ../water/ice.mo-libs = -licemaker
-# ../water/ice.mo-objs = ../water/ice1.o ../water/ice2.o
-#
-# Note that 'hot' didn't include 'water/' in the input, so 'steam.o' is not
-# included.
-#
-define unnest-vars
- # In the case of target build (i.e. $1 == ..), fix path for top level
- # Makefile.objs objects
- $(if $1,$(call fix-paths,$1/,,$2))
-
- # Descend and include every subdir Makefile.objs
- $(foreach v, $2,
- $(call unnest-var-recursive,$1,$2,$v)
- # Pass the .mo-cflags and .mo-libs along to its member objects
- $(foreach o, $(filter %.mo,$($v)),
- $(foreach p,$($o-objs),
- $(if $($o-cflags), $(eval $p-cflags += $($o-cflags)))
- $(if $($o-libs), $(eval $p-libs += $($o-libs))))))
-
- # For all %.mo objects that are directly added into -y, just expand them
- $(foreach v,$(filter %-y,$2),
- $(eval $v := $(foreach o,$($v),$(if $($o-objs),$($o-objs),$o))))
-
- $(foreach v,$(filter %-m,$2),
- # All .o found in *-m variables are single object modules, create .mo
- # for them
- $(foreach o,$(filter %.o,$($v)),
- $(eval $(o:%.o=%.mo)-objs := $o))
- # Now unify .o in -m variable to .mo
- $(eval $v := $($v:%.o=%.mo))
- $(eval modules-m += $($v))
-
- # For module build, build shared libraries during "make modules"
- # For non-module build, add -m to -y
- $(if $(CONFIG_MODULES),
- $(foreach o,$($v),
- $(eval $($o-objs): CFLAGS += $(DSO_OBJ_CFLAGS))
- $(eval $o: $($o-objs)))
- $(eval $(patsubst %-m,%-y,$v) += $($v))
- $(eval modules: $($v:%.mo=%$(DSOSUF))),
- $(eval $(patsubst %-m,%-y,$v) += $(call expand-objs, $($v)))))
-
- # Post-process all the unnested vars
- $(foreach v,$2,
- $(foreach o, $(filter %.mo,$($v)),
- # Find all the .mo objects in variables and add dependency rules
- # according to .mo-objs. Report error if not set
- $(if $($o-objs),
- $(eval $(o:%.mo=%$(DSOSUF)): module-common.o $($o-objs))))
- $(shell mkdir -p ./ $(sort $(dir $($v))))
- # Include all the .d files
- $(eval -include $(patsubst %.o,%.d,$(patsubst %.mo,%.d,$(filter %.o,$($v)))))
- $(eval $v := $(filter-out %/,$($v))))
-endef
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- docs/devel/build-system.txt | 5 +- rules.mak | 179 ------------------------------------ 2 files changed, 1 insertion(+), 183 deletions(-)