From patchwork Wed Jan 8 05:23:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 1219361 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="npF+cXpb"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47syRQ46Vlz9sNx for ; Wed, 8 Jan 2020 16:26:58 +1100 (AEDT) Received: from localhost ([::1]:37008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip3rr-0007vV-SV for incoming@patchwork.ozlabs.org; Wed, 08 Jan 2020 00:26:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47450) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip3oa-0003r3-8m for qemu-devel@nongnu.org; Wed, 08 Jan 2020 00:23:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip3oY-0002gx-QE for qemu-devel@nongnu.org; Wed, 08 Jan 2020 00:23:32 -0500 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:56133 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip3oY-0002de-Ez; Wed, 08 Jan 2020 00:23:30 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 47syMC1LTHz9sST; Wed, 8 Jan 2020 16:23:18 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1578460999; bh=xuXCUv7AbtgO81cRSWzQUqJbuB77DWavVOto6WrS4/U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=npF+cXpbIbKNA8MYsN+2VjGfTfBrrPfWIwpum8DVkMiSVAn8FwLAD8ri63kiYB1Oy dFLxwgisNzTyctVh4sc/SORXPRx+n3Apzn0evJMQR1IBXbITaEDPzaYaHvsRuJkcAi QCci/T0J2Aqv3XAOj2NXs5+qnl5ArIreSqCx/f0Q= From: David Gibson To: peter.maydell@linaro.org Subject: [PULL 18/26] ppc/pnv: Add an "nr-threads" property to the base chip class Date: Wed, 8 Jan 2020 16:23:04 +1100 Message-Id: <20200108052312.238710-19-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200108052312.238710-1-david@gibson.dropbear.id.au> References: <20200108052312.238710-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Greg Kurz Set it at chip creation and forward it to the cores. This allows to drop a call to qdev_get_machine(). Signed-off-by: Greg Kurz Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Message-Id: <20200106145645.4539-7-clg@kaod.org> Signed-off-by: David Gibson --- hw/ppc/pnv.c | 8 +++++--- include/hw/ppc/pnv.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ead92d52b2..6a0aa78d53 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -802,6 +802,8 @@ static void pnv_init(MachineState *machine) &error_fatal); object_property_set_int(chip, machine->smp.cores, "nr-cores", &error_fatal); + object_property_set_int(chip, machine->smp.threads, + "nr-threads", &error_fatal); /* * The POWER8 machine use the XICS interrupt interface. * Propagate the XICS fabric to the chip and its controllers. @@ -1526,7 +1528,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp) static void pnv_chip_core_realize(PnvChip *chip, Error **errp) { - MachineState *ms = MACHINE(qdev_get_machine()); Error *error = NULL; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); const char *typename = pnv_chip_core_typename(chip); @@ -1562,8 +1563,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp) object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core), &error_abort); chip->cores[i] = pnv_core; - object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads", - &error_fatal); + object_property_set_int(OBJECT(pnv_core), chip->nr_threads, + "nr-threads", &error_fatal); object_property_set_int(OBJECT(pnv_core), core_hwid, CPU_CORE_PROP_CORE_ID, &error_fatal); object_property_set_int(OBJECT(pnv_core), @@ -1602,6 +1603,7 @@ static Property pnv_chip_properties[] = { DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0), DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1), DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0), + DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 56277862dd..4b9012f994 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -48,6 +48,7 @@ typedef struct PnvChip { uint64_t ram_size; uint32_t nr_cores; + uint32_t nr_threads; uint64_t cores_mask; PnvCore **cores;