| Message ID | 20191219185609.16748-1-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: Set ISSIs16Bit in make_issinfo | expand |
Richard Henderson <richard.henderson@linaro.org> writes: > During the conversion to decodetree, the setting of > ISSIs16Bit got lost. This causes the guest os to > incorrectly adjust trapping memory operations. > > Fixes: 46beb58efbb8a2a32 It's not really obvious from this commit where we end up now calling... > Cc: qemu-stable@nongnu.org > Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 2b6c1f91bf..9f0afbdb75 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -8556,6 +8556,9 @@ static ISSInfo make_issinfo(DisasContext *s, int rd, bool p, bool w) > /* ISS not valid if writeback */ > if (p && !w) { > ret = rd; > + if (s->base.pc_next - s->pc_curr == 2) { > + ret |= ISSIs16Bit; > + } this function. Should I be seeing op_load_rr/ri in the included generated functions? > } else { > ret = ISSInvalid; > }
On Fri, 20 Dec 2019 at 13:35, Alex Bennée <alex.bennee@linaro.org> wrote: > > > Richard Henderson <richard.henderson@linaro.org> writes: > > > During the conversion to decodetree, the setting of > > ISSIs16Bit got lost. This causes the guest os to > > incorrectly adjust trapping memory operations. > > > > Fixes: 46beb58efbb8a2a32 > > It's not really obvious from this commit where we end up now calling... > > > > Cc: qemu-stable@nongnu.org > > Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > --- > > target/arm/translate.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/target/arm/translate.c b/target/arm/translate.c > > index 2b6c1f91bf..9f0afbdb75 100644 > > --- a/target/arm/translate.c > > +++ b/target/arm/translate.c > > @@ -8556,6 +8556,9 @@ static ISSInfo make_issinfo(DisasContext *s, int rd, bool p, bool w) > > /* ISS not valid if writeback */ > > if (p && !w) { > > ret = rd; > > + if (s->base.pc_next - s->pc_curr == 2) { > > + ret |= ISSIs16Bit; > > + } > > this function. Yeah, the combination of decodetree and the C preprocessor is pretty confusing. There's a macro DO_LDST in translate.c which creates trans_LDR_rr() functions which call op_load_rr() which then calls make_issinfo(); and the decodetree generator is what generates the code that calls trans_LDR_rr() and friends. thanks -- PMM
On Thu, 19 Dec 2019 at 18:56, Richard Henderson <richard.henderson@linaro.org> wrote: > > During the conversion to decodetree, the setting of > ISSIs16Bit got lost. This causes the guest os to > incorrectly adjust trapping memory operations. > > Fixes: 46beb58efbb8a2a32 > Cc: qemu-stable@nongnu.org > Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 2b6c1f91bf..9f0afbdb75 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -8556,6 +8556,9 @@ static ISSInfo make_issinfo(DisasContext *s, int rd, bool p, bool w) > /* ISS not valid if writeback */ > if (p && !w) { > ret = rd; > + if (s->base.pc_next - s->pc_curr == 2) { > + ret |= ISSIs16Bit; > + } > } else { > ret = ISSInvalid; > } > -- > 2.20.1 This is correct, and fixes the regression vs 46beb58efbb8a, but I agree with Jeff that it's not sufficient (and in fact we've always been reporting wrong ISS info as a result) because of the wrong sense of the bool argument to syn_data_abort_with_iss() in merge_syn_data_abort(). thanks -- PMM
diff --git a/target/arm/translate.c b/target/arm/translate.c index 2b6c1f91bf..9f0afbdb75 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8556,6 +8556,9 @@ static ISSInfo make_issinfo(DisasContext *s, int rd, bool p, bool w) /* ISS not valid if writeback */ if (p && !w) { ret = rd; + if (s->base.pc_next - s->pc_curr == 2) { + ret |= ISSIs16Bit; + } } else { ret = ISSInvalid; }
During the conversion to decodetree, the setting of ISSIs16Bit got lost. This causes the guest os to incorrectly adjust trapping memory operations. Fixes: 46beb58efbb8a2a32 Cc: qemu-stable@nongnu.org Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 3 +++ 1 file changed, 3 insertions(+)