diff mbox series

[1/1] target/arm: Allow reading flags from FPSCR for M-profile

Message ID 20191025095711.10853-1-christophe.lyon@linaro.org
State New
Headers show
Series [1/1] target/arm: Allow reading flags from FPSCR for M-profile | expand

Commit Message

Christophe Lyon Oct. 25, 2019, 9:57 a.m. UTC
rt==15 is a special case when reading the flags: it means the
destination is APSR. This patch avoids rejecting
vmrs apsr_nzcv, fpscr
as illegal instruction.

Signed-off-by: Christophe Lyon <christophe.lyon@linaro.org>
---
 target/arm/translate-vfp.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Maydell Nov. 1, 2019, 8:38 a.m. UTC | #1
On Fri, 25 Oct 2019 at 10:57, Christophe Lyon
<christophe.lyon@linaro.org> wrote:
>
> rt==15 is a special case when reading the flags: it means the
> destination is APSR. This patch avoids rejecting
> vmrs apsr_nzcv, fpscr
> as illegal instruction.
>
> Signed-off-by: Christophe Lyon <christophe.lyon@linaro.org>
> ---
>  target/arm/translate-vfp.inc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
> index 9ae980b..82bed5b 100644
> --- a/target/arm/translate-vfp.inc.c
> +++ b/target/arm/translate-vfp.inc.c
> @@ -705,7 +705,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
>           * The only M-profile VFP vmrs/vmsr sysreg is FPSCR.
>           * Writes to R15 are UNPREDICTABLE; we choose to undef.
>           */
> -        if (a->rt == 15 || a->reg != ARM_VFP_FPSCR) {
> +        if (a->rt == 15 && (!a->l || a->reg != ARM_VFP_FPSCR)) {
>              return false;
>          }
>      }
> --=




Applied to target-arm.next, thanks.

-- PMM
diff mbox series

Patch

diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
index 9ae980b..82bed5b 100644
--- a/target/arm/translate-vfp.inc.c
+++ b/target/arm/translate-vfp.inc.c
@@ -705,7 +705,7 @@  static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
          * The only M-profile VFP vmrs/vmsr sysreg is FPSCR.
          * Writes to R15 are UNPREDICTABLE; we choose to undef.
          */
-        if (a->rt == 15 || a->reg != ARM_VFP_FPSCR) {
+        if (a->rt == 15 && (!a->l || a->reg != ARM_VFP_FPSCR)) {
             return false;
         }
     }