From patchwork Tue Oct 8 10:52:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 1173183 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46nZ496BpGz9sP7 for ; Tue, 8 Oct 2019 21:54:49 +1100 (AEDT) Received: from localhost ([::1]:53614 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHn8h-0001w7-3L for incoming@patchwork.ozlabs.org; Tue, 08 Oct 2019 06:54:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46640) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHn7X-0001tc-2N for qemu-devel@nongnu.org; Tue, 08 Oct 2019 06:53:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHn7V-0003pp-KH for qemu-devel@nongnu.org; Tue, 08 Oct 2019 06:53:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48252) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHn7U-0003pO-7O for qemu-devel@nongnu.org; Tue, 08 Oct 2019 06:53:32 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 77EB430860A5; Tue, 8 Oct 2019 10:53:31 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-109.rdu2.redhat.com [10.10.120.109]) by smtp.corp.redhat.com (Postfix) with ESMTP id EB10D5D9C9; Tue, 8 Oct 2019 10:53:26 +0000 (UTC) From: Laszlo Ersek To: qemu devel list Subject: [PATCH 3/4] hw/i386: add facility to expose CPU topology over fw-cfg Date: Tue, 8 Oct 2019 12:52:58 +0200 Message-Id: <20191008105259.5378-4-lersek@redhat.com> In-Reply-To: <20191008105259.5378-1-lersek@redhat.com> References: <20191008105259.5378-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Tue, 08 Oct 2019 10:53:31 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" FW_CFG_MAX_CPUS exposes the (exclusive) maximum APIC ID to guest firmware, due to historical reasons. That value is not useful to edk2, however. For supporting VCPU hotplug, edk2 needs: - the boot CPU count (already exposed in FW_CFG_NB_CPUS), - and the maximum foreseen CPU count (tracked in "MachineState.smp.max_cpus", but not currently exposed). Add a new fw-cfg file to expose "max_cpus". While at it, expose the rest of the topology too (die / core / thread counts), because I expect that the VCPU hotplug feature for OVMF will ultimately need those too, and the data size is not large. This is slightly complicated by the fact that the die count is specific to PCMachineState, but fw_cfg_arch_create() intends to be PC-independent (see commit 149c50cabcc4). For now, the feature is temporarily disabled. Cc: "Michael S. Tsirkin" Cc: Eduardo Habkost Cc: Igor Mammedov Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Philippe Mathieu-Daudé Cc: Richard Henderson Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1515 Signed-off-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.h | 30 +++++++++++++++++++++++++++++- hw/i386/fw_cfg.c | 26 ++++++++++++++++++++++++-- hw/i386/pc.c | 4 ++-- 3 files changed, 55 insertions(+), 5 deletions(-) diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index e0856a376996..d742435b9793 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -18,9 +18,37 @@ #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) +/** + * FWCfgX86Topology: expose the X86 CPU topology to guest firmware over fw-cfg. + * + * All fields have little-endian encoding. + * + * @dies: Number of dies per package (aka socket). Set it to 1 unless the + * concrete MachineState subclass defines it differently. + * @cores: Corresponds to @CpuTopology.@cores. + * @threads: Corresponds to @CpuTopology.@threads. + * @max_cpus: Corresponds to @CpuTopology.@max_cpus. + * + * Firmware can derive the package (aka socket) count with the following + * formula: + * + * DIV_ROUND_UP(@max_cpus, @dies * @cores * @threads) + * + * Firmware can derive APIC ID field widths and offsets per the standard + * calculations in "include/hw/i386/topology.h". + */ +typedef struct FWCfgX86Topology { + uint32_t dies; + uint32_t cores; + uint32_t threads; + uint32_t max_cpus; +} QEMU_PACKED FWCfgX86Topology; + FWCfgState *fw_cfg_arch_create(MachineState *ms, uint16_t boot_cpus, - uint16_t apic_id_limit); + uint16_t apic_id_limit, + unsigned smp_dies, + bool expose_topology); void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg); void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 39b6bc60520c..33d09875014f 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -85,9 +85,26 @@ void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) } } +static void fw_cfg_expose_topology(FWCfgState *fw_cfg, + unsigned dies, + unsigned cores, + unsigned threads, + unsigned max_cpus) +{ + FWCfgX86Topology *topo = g_new(FWCfgX86Topology, 1); + + topo->dies = cpu_to_le32(dies); + topo->cores = cpu_to_le32(cores); + topo->threads = cpu_to_le32(threads); + topo->max_cpus = cpu_to_le32(max_cpus); + fw_cfg_add_file(fw_cfg, "etc/x86-smp-topology", topo, sizeof *topo); +} + FWCfgState *fw_cfg_arch_create(MachineState *ms, - uint16_t boot_cpus, - uint16_t apic_id_limit) + uint16_t boot_cpus, + uint16_t apic_id_limit, + unsigned smp_dies, + bool expose_topology) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -143,6 +160,11 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms, (1 + apic_id_limit + nb_numa_nodes) * sizeof(*numa_fw_cfg)); + if (expose_topology) { + fw_cfg_expose_topology(fw_cfg, smp_dies, ms->smp.cores, + ms->smp.threads, ms->smp.max_cpus); + } + return fw_cfg; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index bcda50efcc23..bb72b12edad2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1738,8 +1738,8 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = fw_cfg_arch_create(machine, - pcms->boot_cpus, pcms->apic_id_limit); + fw_cfg = fw_cfg_arch_create(machine, pcms->boot_cpus, pcms->apic_id_limit, + pcms->smp_dies, false); rom_set_fw(fw_cfg);