From patchwork Fri Aug 23 10:07:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 1152093 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46FHKS6Jgnz9sN6 for ; Fri, 23 Aug 2019 20:13:16 +1000 (AEST) Received: from localhost ([::1]:53710 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i16ZG-0004Cr-R7 for incoming@patchwork.ozlabs.org; Fri, 23 Aug 2019 06:13:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58584) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i16UX-0006s8-Pc for qemu-devel@nongnu.org; Fri, 23 Aug 2019 06:08:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i16UW-0008KE-Kg for qemu-devel@nongnu.org; Fri, 23 Aug 2019 06:08:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59531) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i16UW-0008Jl-FF; Fri, 23 Aug 2019 06:08:20 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B71BC30832DC; Fri, 23 Aug 2019 10:08:19 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-2.ams2.redhat.com [10.36.117.2]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1C9B85D6B2; Fri, 23 Aug 2019 10:08:16 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 23 Aug 2019 12:07:41 +0200 Message-Id: <20190823100741.9621-10-david@redhat.com> In-Reply-To: <20190823100741.9621-1-david@redhat.com> References: <20190823100741.9621-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 23 Aug 2019 10:08:19 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1 9/9] tcg: Check for watchpoints in probe_write() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Riku Voipio , Eduardo Habkost , David Hildenbrand , Aleksandar Rikalo , Cornelia Huck , Richard Henderson , Aleksandar Markovic , qemu-s390x@nongnu.org, Paolo Bonzini , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Let's check for write watchpoints. We'll want to do something similar for probe_read() in the future (once we introduce that). Suggested-by: Richard Henderson Signed-off-by: David Hildenbrand Reviewed-by: Richard Henderson --- accel/tcg/cputlb.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 4b49ccb58a..8382ac2fc2 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1063,6 +1063,7 @@ void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx, { uintptr_t index = tlb_index(env, mmu_idx, addr); CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); + target_ulong tlb_addr; g_assert(-(addr | TARGET_PAGE_MASK) >= size); @@ -1071,8 +1072,23 @@ void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx, if (!VICTIM_TLB_HIT(addr_write, addr)) { tlb_fill(env_cpu(env), addr, size, MMU_DATA_STORE, mmu_idx, retaddr); + /* TLB resize via tlb_fill may have moved the entry. */ + entry = tlb_entry(env, mmu_idx, addr); } } + + if (!size) { + return; + } + tlb_addr = tlb_addr_write(entry); + + /* Watchpoints for this entry only apply if TLB_MMIO was set. */ + if (tlb_addr & TLB_MMIO) { + MemTxAttrs attrs = env_tlb(env)->d[mmu_idx].iotlb[index].attrs; + + cpu_check_watchpoint(env_cpu(env), addr, size, attrs, BP_MEM_WRITE, + retaddr); + } } void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,