diff mbox series

[RFC,v1,13/22] target/i386: reimplement (V)PSUB(B, W, D, Q)

Message ID 20190731175702.4916-14-jan.bobek@gmail.com
State New
Headers show
Series reimplement (some) x86 vector instructions using tcg-gvec | expand

Commit Message

Jan Bobek July 31, 2019, 5:56 p.m. UTC 
Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  6 ------
 target/i386/ops_sse_header.h |  5 -----
 target/i386/translate.c      | 33 +++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 15 deletions(-)
diff mbox series

Patch

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 31a761a89a..59935a65be 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -342,7 +342,6 @@  static inline int satsw(int x)
 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
 #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
 
-#define FSUB(a, b) ((a) - (b))
 #define FSUBUB(a, b) satub((a) - (b))
 #define FSUBUW(a, b) satuw((a) - (b))
 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
@@ -365,11 +364,6 @@  static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_psubb, FSUB)
-SSE_HELPER_W(helper_psubw, FSUB)
-SSE_HELPER_L(helper_psubl, FSUB)
-SSE_HELPER_Q(helper_psubq, FSUB)
-
 SSE_HELPER_B(helper_paddusb, FADDUB)
 SSE_HELPER_B(helper_paddsb, FADDSB)
 SSE_HELPER_B(helper_psubusb, FSUBUB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 5c69ab91d4..bcdbac99a0 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,11 +60,6 @@  DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(psubb, FSUB)
-SSE_HELPER_W(psubw, FSUB)
-SSE_HELPER_L(psubl, FSUB)
-SSE_HELPER_Q(psubq, FSUB)
-
 SSE_HELPER_B(paddusb, FADDUB)
 SSE_HELPER_B(paddsb, FADDSB)
 SSE_HELPER_B(psubusb, FSUBUB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 1dbeb49066..6f4dfd06a1 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2855,10 +2855,10 @@  static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xf6] = MMX_OP2(psadbw),
     [0xf7] = { (SSEFunc_0_epp)gen_helper_maskmov_mmx,
                (SSEFunc_0_epp)gen_helper_maskmov_xmm }, /* XXX: casts */
-    [0xf8] = MMX_OP2(psubb),
-    [0xf9] = MMX_OP2(psubw),
-    [0xfa] = MMX_OP2(psubl),
-    [0xfb] = MMX_OP2(psubq),
+    [0xf8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xf9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfa] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfe] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3171,6 +3171,11 @@  static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 #define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
+#define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
+#define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3326,6 +3331,26 @@  static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;
     case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;
 
+    case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;
+
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;
+
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;
+
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;