From patchwork Wed Jul 3 08:40:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 1126726 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45dvnJ5K08z9s3Z for ; Wed, 3 Jul 2019 18:45:08 +1000 (AEST) Received: from localhost ([::1]:33714 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hiat0-00014H-P4 for incoming@patchwork.ozlabs.org; Wed, 03 Jul 2019 04:45:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51305) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hiapX-0005pX-26 for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:41:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hiapV-0006l7-1F for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:41:30 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:43019) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hiapU-0006iK-RD for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:41:28 -0400 Received: by mail-lf1-f68.google.com with SMTP id j29so1141078lfk.10 for ; Wed, 03 Jul 2019 01:41:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:cc:from:to; bh=EKsqQug7v7zszsNqo0b9Js3bl54LND9OiSrVub9vLW4=; b=Kq5BNuuwkGvrj3t85YG1KdARtxO4kpMpYpT3t5w2e/xuI+HbW2KVi3U3sV7Fnb/Aym +Fd3KxAkhLQbjOh6kU1zu18IIQXqTOoABExjJpxlHafZ1BUwkmfzzUKTR74ilXP10aJe vAaP73apbc/xGHKz/YIGvxJJG13N5EyJUzYMndCH49FUKbbDvL7GXIP96vV6GG679Iuh 3o5HLmGBqXeXHBBfQvlwflBbn1NnZzsuzNmvywYWTkQporQrif93kgRhMXtiUCzv0XaH m+Vksb5VP6JzeKcjl3jHlDWFyR+aOdivWF3aHrF3K6b9o3l7okfkl792wGoMoNM4VP00 eNmg== X-Gm-Message-State: APjAAAXTk70ax+R/SwZdqW44s2+E8n4M6MNyYRHGV13cqY9o5bUFJg1G +URJ1zi4CpwA396p6sqStv3R2c8py0PYJA== X-Google-Smtp-Source: APXvYqyn4n9521d2hOkcHVW+EI+Acl3piueTwGMcX5TUUBLc+rBNDW9kGpchGKgfDDrE6NEPdilYhw== X-Received: by 2002:ac2:5c1d:: with SMTP id r29mr1396312lfp.72.1562143287106; Wed, 03 Jul 2019 01:41:27 -0700 (PDT) Received: from localhost ([134.17.27.127]) by smtp.gmail.com with ESMTPSA id w1sm377128ljm.81.2019.07.03.01.41.26 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 01:41:26 -0700 (PDT) Date: Wed, 3 Jul 2019 01:40:26 -0700 Message-Id: <20190703084048.6980-11-palmer@sifive.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703084048.6980-1-palmer@sifive.com> References: <20190703084048.6980-1-palmer@sifive.com> MIME-Version: 1.0 From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.167.68 Subject: [Qemu-devel] [PULL 10/32] RISC-V: Fix a PMP check with the correct access size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Hesham Almatary Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Hesham Almatary The PMP check should be of the memory access size rather than TARGET_PAGE_SIZE. Signed-off-by: Hesham Almatary Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- target/riscv/cpu_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 66be83210f11..e1b079e69c60 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -452,8 +452,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (riscv_feature(env, RISCV_FEATURE_PMP) && (ret == TRANSLATE_SUCCESS) && - !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type, - mode)) { + !pmp_hart_has_privs(env, pa, size, 1 << access_type, mode)) { ret = TRANSLATE_PMP_FAIL; } if (ret == TRANSLATE_PMP_FAIL) {