From patchwork Thu Jun 27 20:27:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1123655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ZX1G2zbhz9s3C for ; Fri, 28 Jun 2019 06:43:46 +1000 (AEST) Received: from localhost ([::1]:54262 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hgbF8-0006de-Rp for incoming@patchwork.ozlabs.org; Thu, 27 Jun 2019 16:43:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45868) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hgb1I-0001zm-F4 for qemu-devel@nongnu.org; Thu, 27 Jun 2019 16:29:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hgb1G-0000Z5-OT for qemu-devel@nongnu.org; Thu, 27 Jun 2019 16:29:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56642) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hgb16-0000Ep-VR; Thu, 27 Jun 2019 16:29:13 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A0A163082B6B; Thu, 27 Jun 2019 20:29:11 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-69.brq.redhat.com [10.40.204.69]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 78D66600CC; Thu, 27 Jun 2019 20:29:06 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Stephen Checkoway , qemu-devel@nongnu.org Date: Thu, 27 Jun 2019 22:27:03 +0200 Message-Id: <20190627202719.17739-13-philmd@redhat.com> In-Reply-To: <20190627202719.17739-1-philmd@redhat.com> References: <20190627202719.17739-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Thu, 27 Jun 2019 20:29:11 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v5 12/28] hw/block/pflash_cfi02: Fix command address comparison X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Laurent Vivier , Thomas Huth , qemu-block@nongnu.org, Peter Maydell , John Snow , Paolo Bonzini , Alistair Francis , Magnus Damm , Markus Armbruster , Max Reitz , =?utf-8?q?Alex_Benn=C3=A9e?= , Michael Walle , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Antony Pavlov , "Edgar E. Iglesias" , Jan Kiszka , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Stephen Checkoway Most AMD commands only examine 11 bits of the address. This masks the addresses used in the comparison to 11 bits. The exceptions are word or sector addresses which use offset directly rather than the shifted offset, boff. Signed-off-by: Stephen Checkoway Acked-by: Thomas Huth Message-Id: <20190426162624.55977-4-stephen.checkoway@oberlin.edu> [PMD: Prepend 'hw/' in patch subject] Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alistair Francis --- hw/block/pflash_cfi02.c | 8 +++++++- tests/pflash-cfi02-test.c | 12 ++++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index e64dc69c6c..4be3837be5 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -281,11 +281,13 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, } offset &= pfl->chip_len - 1; - boff = offset & (pfl->sector_len - 1); + boff = offset; if (pfl->width == 2) boff = boff >> 1; else if (pfl->width == 4) boff = boff >> 2; + /* Only the least-significant 11 bits are used in most cases. */ + boff &= 0x7FF; switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ @@ -538,6 +540,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) } } + /* Only 11 bits are used in the comparison. */ + pfl->unlock_addr0 &= 0x7FF; + pfl->unlock_addr1 &= 0x7FF; + pflash_setup_mappings(pfl); pfl->rom_mode = 1; sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c index e7e16a8dd8..e090b2e3a0 100644 --- a/tests/pflash-cfi02-test.c +++ b/tests/pflash-cfi02-test.c @@ -21,8 +21,8 @@ #define FLASH_WIDTH 2 #define CFI_ADDR (FLASH_WIDTH * 0x55) -#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555) -#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA) +#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555) +#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA) #define CFI_CMD 0x98 #define UNLOCK0_CMD 0xAA @@ -190,6 +190,14 @@ static void test_flash(void) g_assert_cmphex(flash_read(6), ==, 0xCDEF); g_assert_cmphex(flash_read(8), ==, 0xFFFF); + /* Test ignored high order bits of address. */ + flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD); + flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD); + flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D); + reset(); + qtest_quit(global_qtest); }