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[88.21.202.183]) by smtp.gmail.com with ESMTPSA id l1sm646781wmg.13.2019.06.24.15.28.50 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 24 Jun 2019 15:28:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 25 Jun 2019 00:28:38 +0200 Message-Id: <20190624222844.26584-5-f4bug@amsat.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190624222844.26584-1-f4bug@amsat.org> References: <20190624222844.26584-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH 04/10] hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Aleksandar Rikalo , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?b?RGF1ZMOp?= , =?utf-8?q?Herv=C3=A9_Poussineau?= , Artyom Tarasenko , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Since we'll move this code around, fix its style first: ERROR: space prohibited between function name and open parenthesis ERROR: line over 90 characters Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic --- hw/mips/gt64xxx_pci.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index cfd497960c..0b9fb02475 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -384,8 +384,8 @@ static const VMStateDescription vmstate_gt64120 = { } }; -static void gt64120_writel (void *opaque, hwaddr addr, - uint64_t val, unsigned size) +static void gt64120_writel(void *opaque, hwaddr addr, + uint64_t val, unsigned size) { GT64120State *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); @@ -671,8 +671,8 @@ static void gt64120_writel (void *opaque, hwaddr addr, } } -static uint64_t gt64120_readl (void *opaque, - hwaddr addr, unsigned size) +static uint64_t gt64120_readl(void *opaque, + hwaddr addr, unsigned size) { GT64120State *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); @@ -1193,7 +1193,8 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); qdev_init_nofail(dev); - memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); + memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, + "isd-mem", 0x1000); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); return phb->bus;