| Message ID | 20190529072726.7875-2-david@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | s390x: Fix vector register alignment | expand |
On 5/29/19 2:27 AM, David Hildenbrand wrote: > 11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store") > revealed that the vregs are not aligned to 16 bytes. Align them to > 16 bytes, to avoid segfault'ing on x86. > > Signed-off-by: David Hildenbrand <david@redhat.com> > --- > target/s390x/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 7305cacc7b..1bed12b6c3 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -66,7 +66,7 @@ struct CPUS390XState { * The floating point registers are part of the vector registers. * vregs[0][0] -> vregs[15][0] are 16 floating point registers */ - CPU_DoubleU vregs[32][2]; /* vector registers */ + CPU_DoubleU vregs[32][2] QEMU_ALIGNED(16); /* vector registers */ uint32_t aregs[16]; /* access registers */ uint8_t riccb[64]; /* runtime instrumentation control */ uint64_t gscb[4]; /* guarded storage control */
11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store") revealed that the vregs are not aligned to 16 bytes. Align them to 16 bytes, to avoid segfault'ing on x86. Signed-off-by: David Hildenbrand <david@redhat.com> --- target/s390x/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)