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[97.113.189.189]) by smtp.gmail.com with ESMTPSA id j1sm15793183pgp.91.2019.05.07.17.07.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 17:07:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 17:06:41 -0700 Message-Id: <20190508000641.19090-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190508000641.19090-1-richard.henderson@linaro.org> References: <20190508000641.19090-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::52d Subject: [Qemu-devel] [PATCH v3 39/39] tcg/arm: Remove mostly unreachable tlb special case X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" There was nothing armv7 specific about the bic+cmp sequence, however looking at the set of guests more closely shows that the 8-bit immediate operand for the bic can only be satisfied with one guest in tree: baseline m-profile -- 10-bit pages with aligned 4-byte memory ops. Therefore it does not seem useful to keep this path. Signed-off-by: Richard Henderson Acked-by: Alistair Francis --- tcg/arm/tcg-target.inc.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index ac813abfb8..e0fcc1d990 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -1290,19 +1290,20 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi, tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1, offsetof(CPUTLBEntry, addend)); - /* Check alignment, check comparators. */ - if (use_armv7_instructions) { + /* + * Check alignment, check comparators. + * Do this in no more than 3 insns. Use MOVW for v7, if possible, + * to reduce the number of sequential conditional instructions. + * Almost all guests have at least 4k pages, which means that we need + * to clear at least 9 bits even for an 8-byte memory, which means it + * isn't worth checking for an immediate operand for BIC. + */ + if (use_armv7_instructions && TARGET_PAGE_BITS <= 16) { tcg_target_ulong mask = ~(TARGET_PAGE_MASK | ((1 << a_bits) - 1)); - int rot = encode_imm(mask); - if (rot >= 0) { - tcg_out_dat_imm(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo, - rotl(mask, rot) | (rot << 7)); - } else { - tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask); - tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP, - addrlo, TCG_REG_TMP, 0); - } + tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask); + tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP, + addrlo, TCG_REG_TMP, 0); tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R2, TCG_REG_TMP, 0); } else { if (a_bits) {