| Message ID | 20190508000641.19090-13-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Move the softmmu tlb to CPUNegativeOffsetState | expand |
On Tue, May 7, 2019 at 5:10 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/cris/cpu.h | 5 ----- > linux-user/cris/cpu_loop.c | 2 +- > target/cris/mmu.c | 3 +-- > target/cris/op_helper.c | 10 +++------- > target/cris/translate.c | 2 +- > 5 files changed, 6 insertions(+), 16 deletions(-) > > diff --git a/target/cris/cpu.h b/target/cris/cpu.h > index 883799b463..7f244ad545 100644 > --- a/target/cris/cpu.h > +++ b/target/cris/cpu.h > @@ -183,11 +183,6 @@ struct CRISCPU { > CPUCRISState env; > }; > > -static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) > -{ > - return container_of(env, CRISCPU, env); > -} > - > #define ENV_OFFSET offsetof(CRISCPU, env) > > #ifndef CONFIG_USER_ONLY > diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c > index 7ec36cb0b5..86e711108d 100644 > --- a/linux-user/cris/cpu_loop.c > +++ b/linux-user/cris/cpu_loop.c > @@ -23,7 +23,7 @@ > > void cpu_loop(CPUCRISState *env) > { > - CPUState *cs = CPU(cris_env_get_cpu(env)); > + CPUState *cs = env_cpu(env); > int trapnr, ret; > target_siginfo_t info; > > diff --git a/target/cris/mmu.c b/target/cris/mmu.c > index 9cb73bbfec..2acbcfd1c7 100644 > --- a/target/cris/mmu.c > +++ b/target/cris/mmu.c > @@ -288,7 +288,6 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res, > > void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid) > { > - CRISCPU *cpu = cris_env_get_cpu(env); > target_ulong vaddr; > unsigned int idx; > uint32_t lo, hi; > @@ -312,7 +311,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid) > if (tlb_v && !tlb_g && (tlb_pid == pid)) { > vaddr = tlb_vpn << TARGET_PAGE_BITS; > D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); > - tlb_flush_page(CPU(cpu), vaddr); > + tlb_flush_page(env_cpu(env), vaddr); > } > } > } > diff --git a/target/cris/op_helper.c b/target/cris/op_helper.c > index d4479167a5..0e323c1dd7 100644 > --- a/target/cris/op_helper.c > +++ b/target/cris/op_helper.c > @@ -67,7 +67,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size, > > void helper_raise_exception(CPUCRISState *env, uint32_t index) > { > - CPUState *cs = CPU(cris_env_get_cpu(env)); > + CPUState *cs = env_cpu(env); > > cs->exception_index = index; > cpu_loop_exit(cs); > @@ -86,8 +86,7 @@ void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) > void helper_spc_write(CPUCRISState *env, uint32_t new_spc) > { > #if !defined(CONFIG_USER_ONLY) > - CRISCPU *cpu = cris_env_get_cpu(env); > - CPUState *cs = CPU(cpu); > + CPUState *cs = env_cpu(env); > > tlb_flush_page(cs, env->pregs[PR_SPC]); > tlb_flush_page(cs, new_spc); > @@ -100,9 +99,6 @@ void helper_spc_write(CPUCRISState *env, uint32_t new_spc) > > void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) > { > -#if !defined(CONFIG_USER_ONLY) > - CRISCPU *cpu = cris_env_get_cpu(env); > -#endif > uint32_t srs; > srs = env->pregs[PR_SRS]; > srs &= 3; > @@ -140,7 +136,7 @@ void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) > D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", > vaddr, tlb_v, env->pc); > if (tlb_v) { > - tlb_flush_page(CPU(cpu), vaddr); > + tlb_flush_page(env_cpu(env), vaddr); > } > } > } > diff --git a/target/cris/translate.c b/target/cris/translate.c > index b005a5c20e..c0af9665fc 100644 > --- a/target/cris/translate.c > +++ b/target/cris/translate.c > @@ -3104,7 +3104,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) > * delayslot, like in real hw. > */ > pc_start = tb->pc & ~1; > - dc->cpu = cris_env_get_cpu(env); > + dc->cpu = env_archcpu(env); > dc->tb = tb; > > dc->is_jmp = DISAS_NEXT; > -- > 2.17.1 > >
diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 883799b463..7f244ad545 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -183,11 +183,6 @@ struct CRISCPU { CPUCRISState env; }; -static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) -{ - return container_of(env, CRISCPU, env); -} - #define ENV_OFFSET offsetof(CRISCPU, env) #ifndef CONFIG_USER_ONLY diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c index 7ec36cb0b5..86e711108d 100644 --- a/linux-user/cris/cpu_loop.c +++ b/linux-user/cris/cpu_loop.c @@ -23,7 +23,7 @@ void cpu_loop(CPUCRISState *env) { - CPUState *cs = CPU(cris_env_get_cpu(env)); + CPUState *cs = env_cpu(env); int trapnr, ret; target_siginfo_t info; diff --git a/target/cris/mmu.c b/target/cris/mmu.c index 9cb73bbfec..2acbcfd1c7 100644 --- a/target/cris/mmu.c +++ b/target/cris/mmu.c @@ -288,7 +288,6 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res, void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid) { - CRISCPU *cpu = cris_env_get_cpu(env); target_ulong vaddr; unsigned int idx; uint32_t lo, hi; @@ -312,7 +311,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid) if (tlb_v && !tlb_g && (tlb_pid == pid)) { vaddr = tlb_vpn << TARGET_PAGE_BITS; D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); - tlb_flush_page(CPU(cpu), vaddr); + tlb_flush_page(env_cpu(env), vaddr); } } } diff --git a/target/cris/op_helper.c b/target/cris/op_helper.c index d4479167a5..0e323c1dd7 100644 --- a/target/cris/op_helper.c +++ b/target/cris/op_helper.c @@ -67,7 +67,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size, void helper_raise_exception(CPUCRISState *env, uint32_t index) { - CPUState *cs = CPU(cris_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cs->exception_index = index; cpu_loop_exit(cs); @@ -86,8 +86,7 @@ void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) void helper_spc_write(CPUCRISState *env, uint32_t new_spc) { #if !defined(CONFIG_USER_ONLY) - CRISCPU *cpu = cris_env_get_cpu(env); - CPUState *cs = CPU(cpu); + CPUState *cs = env_cpu(env); tlb_flush_page(cs, env->pregs[PR_SPC]); tlb_flush_page(cs, new_spc); @@ -100,9 +99,6 @@ void helper_spc_write(CPUCRISState *env, uint32_t new_spc) void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) { -#if !defined(CONFIG_USER_ONLY) - CRISCPU *cpu = cris_env_get_cpu(env); -#endif uint32_t srs; srs = env->pregs[PR_SRS]; srs &= 3; @@ -140,7 +136,7 @@ void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", vaddr, tlb_v, env->pc); if (tlb_v) { - tlb_flush_page(CPU(cpu), vaddr); + tlb_flush_page(env_cpu(env), vaddr); } } } diff --git a/target/cris/translate.c b/target/cris/translate.c index b005a5c20e..c0af9665fc 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -3104,7 +3104,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) * delayslot, like in real hw. */ pc_start = tb->pc & ~1; - dc->cpu = cris_env_get_cpu(env); + dc->cpu = env_archcpu(env); dc->tb = tb; dc->is_jmp = DISAS_NEXT;