| Message ID | 20190426162624.55977-11-stephen.checkoway@oberlin.edu |
|---|---|
| State | New |
| Headers | show |
| Series | block/pflash_cfi02: Implement missing AMD pflash functionality | expand |
On 4/26/19 6:26 PM, Stephen Checkoway wrote: > When erasing the chip, use the typical time specified in the CFI table > rather than arbitrarily selecting 5 seconds. > > Since the currently unconfigurable value set in the table is 12, this > means a chip erase takes 4096 ms so this isn't a big change in behavior. > > Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu> > --- > hw/block/pflash_cfi02.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c > index d9087cafff..76c8af4365 100644 > --- a/hw/block/pflash_cfi02.c > +++ b/hw/block/pflash_cfi02.c > @@ -633,9 +633,9 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, > pflash_update(pfl, 0, pfl->total_len); > } > set_dq7(pfl, 0x00); > - /* Let's wait 5 seconds before chip erase is done */ > + /* Wait the time specified at CFI address 0x22. */ > timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + > - (NANOSECONDS_PER_SECOND * 5)); > + (1ULL << pfl->cfi_table[0x22]) * SCALE_MS); > break; > case 0x30: > /* Sector erase */ > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index d9087cafff..76c8af4365 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -633,9 +633,9 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, pflash_update(pfl, 0, pfl->total_len); } set_dq7(pfl, 0x00); - /* Let's wait 5 seconds before chip erase is done */ + /* Wait the time specified at CFI address 0x22. */ timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + - (NANOSECONDS_PER_SECOND * 5)); + (1ULL << pfl->cfi_table[0x22]) * SCALE_MS); break; case 0x30: /* Sector erase */
When erasing the chip, use the typical time specified in the CFI table rather than arbitrarily selecting 5 seconds. Since the currently unconfigurable value set in the table is 12, this means a chip erase takes 4096 ms so this isn't a big change in behavior. Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu> --- hw/block/pflash_cfi02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)