From patchwork Tue Mar 12 08:54:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 1055212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="iDEla8/Z"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JTvb63YYz9sBp for ; Tue, 12 Mar 2019 20:19:55 +1100 (AEDT) Received: from localhost ([127.0.0.1]:47922 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3dZh-0004jk-M1 for incoming@patchwork.ozlabs.org; Tue, 12 Mar 2019 05:19:53 -0400 Received: from eggs.gnu.org ([209.51.188.92]:47629) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3dCL-0001jH-Gl for qemu-devel@nongnu.org; Tue, 12 Mar 2019 04:55:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h3dCK-0001eJ-Ht for qemu-devel@nongnu.org; Tue, 12 Mar 2019 04:55:45 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:40655) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h3dCJ-0001Zt-Or; Tue, 12 Mar 2019 04:55:44 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44JTMM6fG0z9sPF; Tue, 12 Mar 2019 19:55:27 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1552380927; bh=Ie5zM0oVpXB+FEJVG1zsQ1KBzBG/ZFo4e+xPEjNQdsY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iDEla8/ZPd+/iAHIoJGYmNt8GS5Inw6Ga9sgcCWtmp8niyYvXsJQ7z1+uMLvzUQX8 g9FbD9tUk9rxUEqmQPOTjcx7PSQ86QncOYRMlMF+wp1AkljBu8NBIcRx3QpzwtcVIi ZDyOqLrURY4oSqyHENvflLanax9HcM8qbsMu0ilM= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 12 Mar 2019 19:54:27 +1100 Message-Id: <20190312085502.8203-28-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190312085502.8203-1-david@gibson.dropbear.id.au> References: <20190312085502.8203-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 27/62] ppc/pnv: introduce a new dt_populate() operation to the chip model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Cédric Le Goater The POWER9 and POWER8 processors have a different set of devices and a different device tree layout. Signed-off-by: Cédric Le Goater Message-Id: <20190306085032.15744-8-clg@kaod.org> Signed-off-by: David Gibson --- hw/ppc/pnv.c | 27 +++++++++++++++++++++++++-- include/hw/ppc/pnv.h | 1 + 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index a7ec76dbd6..087541a91a 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -267,7 +267,7 @@ static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t pir, g_free(reg); } -static void pnv_dt_chip(PnvChip *chip, void *fdt) +static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt) { const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); @@ -289,6 +289,25 @@ static void pnv_dt_chip(PnvChip *chip, void *fdt) } } +static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) +{ + const char *typename = pnv_chip_core_typename(chip); + size_t typesize = object_type_get_instance_size(typename); + int i; + + pnv_dt_xscom(chip, fdt, 0); + + for (i = 0; i < chip->nr_cores; i++) { + PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize); + + pnv_dt_core(chip, pnv_core, fdt); + } + + if (chip->ram_size) { + pnv_dt_memory(fdt, chip->chip_id, chip->ram_start, chip->ram_size); + } +} + static void pnv_dt_rtc(ISADevice *d, void *fdt, int lpc_off) { uint32_t io_base = d->ioport_id; @@ -474,7 +493,7 @@ static void *pnv_dt_create(MachineState *machine) /* Populate device tree for each chip */ for (i = 0; i < pnv->num_chips; i++) { - pnv_dt_chip(pnv->chips[i], fdt); + PNV_CHIP_GET_CLASS(pnv->chips[i])->dt_populate(pnv->chips[i], fdt); } /* Populate ISA devices on chip 0 */ @@ -858,6 +877,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) k->core_pir = pnv_chip_core_pir_p8; k->intc_create = pnv_chip_power8_intc_create; k->isa_create = pnv_chip_power8_isa_create; + k->dt_populate = pnv_chip_power8_dt_populate; k->xscom_base = 0x003fc0000000000ull; dc->desc = "PowerNV Chip POWER8E"; @@ -876,6 +896,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) k->core_pir = pnv_chip_core_pir_p8; k->intc_create = pnv_chip_power8_intc_create; k->isa_create = pnv_chip_power8_isa_create; + k->dt_populate = pnv_chip_power8_dt_populate; k->xscom_base = 0x003fc0000000000ull; dc->desc = "PowerNV Chip POWER8"; @@ -894,6 +915,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) k->core_pir = pnv_chip_core_pir_p8; k->intc_create = pnv_chip_power8_intc_create; k->isa_create = pnv_chip_power8nvl_isa_create; + k->dt_populate = pnv_chip_power8_dt_populate; k->xscom_base = 0x003fc0000000000ull; dc->desc = "PowerNV Chip POWER8NVL"; @@ -954,6 +976,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) k->core_pir = pnv_chip_core_pir_p9; k->intc_create = pnv_chip_power9_intc_create; k->isa_create = pnv_chip_power9_isa_create; + k->dt_populate = pnv_chip_power9_dt_populate; k->xscom_base = 0x00603fc00000000ull; dc->desc = "PowerNV Chip POWER9"; diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index ebbb3d0e9a..fa9ec50fd5 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -102,6 +102,7 @@ typedef struct PnvChipClass { uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp); ISABus *(*isa_create)(PnvChip *chip, Error **errp); + void (*dt_populate)(PnvChip *chip, void *fdt); } PnvChipClass; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP