From patchwork Thu Mar 7 18:05:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1053211 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44Ffqx00djz9s7T for ; Fri, 8 Mar 2019 05:51:56 +1100 (AEDT) Received: from localhost ([127.0.0.1]:57352 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1y7W-00047S-T6 for incoming@patchwork.ozlabs.org; Thu, 07 Mar 2019 13:51:54 -0500 Received: from eggs.gnu.org ([209.51.188.92]:48320) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1xOh-0007CP-ID for qemu-devel@nongnu.org; Thu, 07 Mar 2019 13:05:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h1xOf-0006F8-8l for qemu-devel@nongnu.org; Thu, 07 Mar 2019 13:05:35 -0500 Received: from [2001:41c9:1:41f::167] (port=51942 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h1xOb-00069P-Hz; Thu, 07 Mar 2019 13:05:31 -0500 Received: from host86-177-156-179.range86-177.btcentralplus.com ([86.177.156.179] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1h1xOX-0000Tl-0r; Thu, 07 Mar 2019 18:05:25 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, richard.henderson@linaro.org Date: Thu, 7 Mar 2019 18:05:15 +0000 Message-Id: <20190307180520.13868-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190307180520.13868-1-mark.cave-ayland@ilande.co.uk> References: <20190307180520.13868-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.156.179 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:41c9:1:41f::167 Subject: [Qemu-devel] [PATCH v2 2/7] target/ppc: introduce single vsrl_offset() function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Instead of having multiple copies of the offset calculation logic, move it to a single vsrl_offset() function. This commit also renames the existing get_vsr()/set_vsr() functions to get_vsrl()/set_vsrl() which better describes their purpose. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/cpu.h | 7 ++++++- target/ppc/translate/vsx-impl.inc.c | 12 ++++++------ 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 4bb4e42670..4a7df13c2d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2573,9 +2573,14 @@ static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i) return (uint64_t *)((uintptr_t)env + fpr_offset(i)); } +static inline int vsrl_offset(int i) +{ + return offsetof(CPUPPCState, vsr[i].u64[1]); +} + static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i) { - return &env->vsr[i].u64[1]; + return (uint64_t *)((uintptr_t)env + vsrl_offset(i)); } static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index e73197e717..381ae0f2e9 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1,13 +1,13 @@ /*** VSX extension ***/ -static inline void get_vsr(TCGv_i64 dst, int n) +static inline void get_vsrl(TCGv_i64 dst, int n) { - tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); + tcg_gen_ld_i64(dst, cpu_env, vsrl_offset(n)); } -static inline void set_vsr(int n, TCGv_i64 src) +static inline void set_vsrl(int n, TCGv_i64 src) { - tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); + tcg_gen_st_i64(src, cpu_env, vsrl_offset(n)); } static inline int vsr_full_offset(int n) @@ -27,7 +27,7 @@ static inline void get_cpu_vsrh(TCGv_i64 dst, int n) static inline void get_cpu_vsrl(TCGv_i64 dst, int n) { if (n < 32) { - get_vsr(dst, n); + get_vsrl(dst, n); } else { get_avr64(dst, n - 32, false); } @@ -45,7 +45,7 @@ static inline void set_cpu_vsrh(int n, TCGv_i64 src) static inline void set_cpu_vsrl(int n, TCGv_i64 src) { if (n < 32) { - set_vsr(n, src); + set_vsrl(n, src); } else { set_avr64(n - 32, src, false); }