From patchwork Tue Feb 26 04:52:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 1048084 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="Ok+G6GyO"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 447mgs3PVDz9s5c for ; Tue, 26 Feb 2019 15:54:32 +1100 (AEDT) Received: from localhost ([127.0.0.1]:48702 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyUlC-0004Tt-Km for incoming@patchwork.ozlabs.org; Mon, 25 Feb 2019 23:54:30 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57407) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyUkE-0004Sp-4s for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:53:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyUjz-0000fw-9B for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:53:19 -0500 Received: from ozlabs.org ([203.11.71.1]:55027) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyUjx-0000a9-D6; Mon, 25 Feb 2019 23:53:14 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 447mfF37Xmz9s70; Tue, 26 Feb 2019 15:53:09 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1551156789; bh=fBTFbqGRC3EpVcDgIIpTd1Mx93T8kZd/TF0pI25Vvks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ok+G6GyOQJKzxrDv6DVLw/SG4wV0YIVCfjb5G2fHyChxmB2WwvWUFljAhZ8YkfRBI pN2F5b1QTFHDWbsRy4aB1IROuzTSImBuex+cVT1AICTaZqGDFJZ/T+Mu41vUTCLXNu ImrSn3qewvGtMX+GeNcPLwqQ/8oAIv8L3vyi8Q5c= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 26 Feb 2019 15:52:16 +1100 Message-Id: <20190226045304.25618-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190226045304.25618-1-david@gibson.dropbear.id.au> References: <20190226045304.25618-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 02/50] target/ppc: Don't clobber MSR:EE on PM instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, gkurz@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Benjamin Herrenschmidt When issuing a power management instruction, we set MSR:EE to force ppc_hw_interrupt() into calling powerpc_excp() to deal with the fact that on P7 and P8, the system reset caused by the wakeup needs to be generated regardless of the MSR:EE value (using LPCR only). This however means that the OS will see a bogus SRR1:EE value which is a problem. It also prevents properly implementing P9 STOP "light". So fix this by instead putting some logic in ppc_hw_interrupt() to decide whether to deliver or not by taking into account the fact that we are waking up from sleep. The LPCR isn't checked as this is done in the has_work() test. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Message-Id: <20190215161648.9600-3-clg@kaod.org> Signed-off-by: David Gibson --- target/ppc/excp_helper.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 8407e0ade9..7c7c8d1b9d 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -748,6 +748,7 @@ void ppc_cpu_do_interrupt(CPUState *cs) static void ppc_hw_interrupt(CPUPPCState *env) { PowerPCCPU *cpu = ppc_env_get_cpu(env); + bool async_deliver; /* External reset */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) { @@ -769,11 +770,20 @@ static void ppc_hw_interrupt(CPUPPCState *env) return; } #endif + + /* + * For interrupts that gate on MSR:EE, we need to do something a + * bit more subtle, as we need to let them through even when EE is + * clear when coming out of some power management states (in order + * for them to become a 0x100). + */ + async_deliver = (msr_ee != 0) || env->in_pm_state; + /* Hypervisor decrementer exception */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) { /* LPCR will be clear when not supported so this will work */ bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); - if ((msr_ee != 0 || msr_hv == 0) && hdice) { + if ((async_deliver || msr_hv == 0) && hdice) { /* HDEC clears on delivery */ env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR); powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_HDECR); @@ -783,7 +793,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) /* Extermal interrupt can ignore MSR:EE under some circumstances */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_EXT)) { bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0); - if (msr_ee != 0 || (env->has_hv_mode && msr_hv == 0 && !lpes0)) { + if (async_deliver || (env->has_hv_mode && msr_hv == 0 && !lpes0)) { powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_EXTERNAL); return; } @@ -795,7 +805,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) return; } } - if (msr_ee != 0) { + if (async_deliver != 0) { /* Watchdog timer on embedded PowerPC */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_WDT)) { env->pending_interrupts &= ~(1 << PPC_INTERRUPT_WDT); @@ -943,21 +953,14 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn) cs = CPU(ppc_env_get_cpu(env)); cs->halted = 1; - env->in_pm_state = true; /* The architecture specifies that HDEC interrupts are * discarded in PM states */ env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR); - /* Technically, nap doesn't set EE, but if we don't set it - * then ppc_hw_interrupt() won't deliver. We could add some - * other tests there based on LPCR but it's simpler to just - * whack EE in. It will be cleared by the 0x100 at wakeup - * anyway. It will still be observable by the guest in SRR1 - * but this doesn't seem to be a problem. - */ - env->msr |= (1ull << MSR_EE); + /* Condition for waking up at 0x100 */ + env->in_pm_state = true; } #endif /* defined(TARGET_PPC64) */