From patchwork Fri Feb 22 08:11:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 1046638 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 445PGh3m8Pz9s70 for ; Fri, 22 Feb 2019 19:13:00 +1100 (AEDT) Received: from localhost ([127.0.0.1]:46280 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gx5x4-0004J0-BW for incoming@patchwork.ozlabs.org; Fri, 22 Feb 2019 03:12:58 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43328) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gx5wI-0004GV-PP for qemu-devel@nongnu.org; Fri, 22 Feb 2019 03:12:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gx5wH-00075a-BB for qemu-devel@nongnu.org; Fri, 22 Feb 2019 03:12:10 -0500 Received: from mx1.redhat.com ([209.132.183.28]:54050) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gx5wG-00073Y-GH; Fri, 22 Feb 2019 03:12:09 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9383C66220; Fri, 22 Feb 2019 08:12:07 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-150.ams2.redhat.com [10.36.117.150]) by smtp.corp.redhat.com (Postfix) with ESMTP id 077701001947; Fri, 22 Feb 2019 08:11:58 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 22 Feb 2019 09:11:51 +0100 Message-Id: <20190222081153.14206-2-david@redhat.com> In-Reply-To: <20190222081153.14206-1-david@redhat.com> References: <20190222081153.14206-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 22 Feb 2019 08:12:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1 1/3] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" As we will support vector instructions soon, and vector registers are stored in 64bit host chunks, let's use cpu_to_be64. Same applies to the guarded storage control block. Signed-off-by: David Hildenbrand Reviewed-by: Thomas Huth Reviewed-by: Christian Borntraeger --- target/s390x/helper.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 3d74836a83..f3fcf96482 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -272,32 +272,43 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) return 0; } -#define ADTL_GS_OFFSET 1024 /* offset of GS data in adtl save area */ +typedef struct SigpAdtlSaveArea { + uint64_t vregs[32][2]; /* 0x0000 */ + uint8_t pad_0x0200[0x0400 - 0x0200]; /* 0x0200 */ + uint64_t gscb[4]; /* 0x0400 */ + uint8_t pad_0x0420[0x1000 - 0x0420]; /* 0x0420 */ +} SigpAdtlSaveArea; +QEMU_BUILD_BUG_ON(sizeof(SigpAdtlSaveArea) != 4096); + #define ADTL_GS_MIN_SIZE 2048 /* minimal size of adtl save area for GS */ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) { + SigpAdtlSaveArea *sa; hwaddr save = len; - void *mem; + int i; - mem = cpu_physical_memory_map(addr, &save, 1); - if (!mem) { + sa = cpu_physical_memory_map(addr, &save, 1); + if (!sa) { return -EFAULT; } if (save != len) { - cpu_physical_memory_unmap(mem, len, 1, 0); + cpu_physical_memory_unmap(sa, len, 1, 0); return -EFAULT; } - /* FIXME: as soon as TCG supports these features, convert cpu->be */ if (s390_has_feat(S390_FEAT_VECTOR)) { - memcpy(mem, &cpu->env.vregs, 512); + for (i = 0; i < 32; i++) { + sa->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i][0].ll); + sa->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i][1].ll); + } } if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && len >= ADTL_GS_MIN_SIZE) { - memcpy(mem + ADTL_GS_OFFSET, &cpu->env.gscb, 32); + for (i = 0; i < 4; i++) { + sa->gscb[i] = cpu_to_be64(cpu->env.gscb[i]); + } } - cpu_physical_memory_unmap(mem, len, 1, len); - + cpu_physical_memory_unmap(sa, len, 1, len); return 0; } #endif /* CONFIG_USER_ONLY */