From patchwork Mon Feb 4 09:01:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 1035749 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="MTZ33Ng2"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43tMfc6vDdz9s6w for ; Mon, 4 Feb 2019 20:22:00 +1100 (AEDT) Received: from localhost ([127.0.0.1]:39223 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gqaRy-0008JP-Uz for incoming@patchwork.ozlabs.org; Mon, 04 Feb 2019 04:21:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38918) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gqa9V-0001FC-OV for qemu-devel@nongnu.org; Mon, 04 Feb 2019 04:02:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gqa9N-0000Ht-M3 for qemu-devel@nongnu.org; Mon, 04 Feb 2019 04:02:47 -0500 Received: from ozlabs.org ([203.11.71.1]:34137) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gqa9F-0007lH-SM; Mon, 04 Feb 2019 04:02:41 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 43tMC95Wfjz9sPP; Mon, 4 Feb 2019 20:01:37 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1549270901; bh=aqR7BdE02b0xyQIKa0TF//sPeR3Z5QGMoMpAU3iHlKE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MTZ33Ng2lyfp6/Hyv74Dy6aNqjun9SA40RqruerR4JT72up4jXGVtMfmOW9rI4Pa2 zcUcUy2+1hh1NKbmmqwiDaONFo5P3d0zcO9rj1HAFG6hQnlQZTYOv5tPbKiLswXNjb P1S+ZSUXVNpf0RFu9n60nuPKI0/zELpI9xPMepj0= From: David Gibson To: peter.maydell@linaro.org Date: Mon, 4 Feb 2019 20:01:03 +1100 Message-Id: <20190204090124.26191-17-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190204090124.26191-1-david@gibson.dropbear.id.au> References: <20190204090124.26191-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 16/37] ppc/pnv: introduce a CPU machine_data X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, spopovyc@redhat.com, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Cédric Le Goater Include the interrupt presenter under the machine_data as we plan to remove it from under PowerPCCPU Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: David Gibson --- hw/ppc/pnv.c | 7 ++++--- hw/ppc/pnv_core.c | 12 +++++++++++- include/hw/ppc/pnv_core.h | 9 +++++++++ 3 files changed, 24 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d84acef55b..da540860a2 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -673,6 +673,7 @@ static void pnv_chip_power8_intc_create(PnvChip *chip, PowerPCCPU *cpu, { Error *local_err = NULL; Object *obj; + PnvCPUState *pnv_cpu = pnv_cpu_state(cpu); obj = icp_create(OBJECT(cpu), TYPE_PNV_ICP, XICS_FABRIC(qdev_get_machine()), &local_err); @@ -681,7 +682,7 @@ static void pnv_chip_power8_intc_create(PnvChip *chip, PowerPCCPU *cpu, return; } - cpu->icp = ICP(obj); + pnv_cpu->icp = ICP(obj); } /* @@ -1099,7 +1100,7 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir) { PowerPCCPU *cpu = ppc_get_vcpu_by_pir(pir); - return cpu ? cpu->icp : NULL; + return cpu ? pnv_cpu_state(cpu)->icp : NULL; } static void pnv_pic_print_info(InterruptStatsProvider *obj, @@ -1112,7 +1113,7 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - icp_pic_print_info(cpu->icp, mon); + icp_pic_print_info(pnv_cpu_state(cpu)->icp, mon); } for (i = 0; i < pnv->num_chips; i++) { diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index b98f277f1e..7c806da720 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -155,7 +155,10 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) pc->threads = g_new(PowerPCCPU *, cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { + PowerPCCPU *cpu; + obj = object_new(typename); + cpu = POWERPC_CPU(obj); pc->threads[i] = POWERPC_CPU(obj); @@ -163,6 +166,9 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) object_property_add_child(OBJECT(pc), name, obj, &error_abort); object_property_add_alias(obj, "core-pir", OBJECT(pc), "pir", &error_abort); + + cpu->machine_data = g_new0(PnvCPUState, 1); + object_unref(obj); } @@ -189,9 +195,13 @@ err: static void pnv_unrealize_vcpu(PowerPCCPU *cpu) { + PnvCPUState *pnv_cpu = pnv_cpu_state(cpu); + qemu_unregister_reset(pnv_cpu_reset, cpu); - object_unparent(OBJECT(cpu->icp)); + object_unparent(OBJECT(pnv_cpu_state(cpu)->icp)); cpu_remove_sync(CPU(cpu)); + cpu->machine_data = NULL; + g_free(pnv_cpu); object_unparent(OBJECT(cpu)); } diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 447ae761f7..9961ea3a92 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -47,4 +47,13 @@ typedef struct PnvCoreClass { #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX +typedef struct PnvCPUState { + struct ICPState *icp; +} PnvCPUState; + +static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) +{ + return (PnvCPUState *)cpu->machine_data; +} + #endif /* _PPC_PNV_CORE_H */