Message ID | 20190201160653.13829-3-peter.maydell@linaro.org |
---|---|
State | New |
Headers | show
Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="QVufptqc"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43rhsk1J2fz9sDr for <incoming@patchwork.ozlabs.org>; Sat, 2 Feb 2019 03:10:50 +1100 (AEDT) Received: from localhost ([127.0.0.1]:57264 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>) id 1gpbOy-0001fN-60 for incoming@patchwork.ozlabs.org; Fri, 01 Feb 2019 11:10:48 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1gpbLJ-0007ZL-Ip for qemu-devel@nongnu.org; Fri, 01 Feb 2019 11:07:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1gpbLI-0003G1-H8 for qemu-devel@nongnu.org; Fri, 01 Feb 2019 11:07:01 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:45066) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1gpbLH-0003FY-T7 for qemu-devel@nongnu.org; Fri, 01 Feb 2019 11:07:00 -0500 Received: by mail-wr1-x430.google.com with SMTP id t6so7607607wrr.12 for <qemu-devel@nongnu.org>; Fri, 01 Feb 2019 08:06:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=UuVW7tpTbDI/qssggkHCCe5zSzAPxwdivNU6kF+NI+c=; b=QVufptqcd/B7I7r+uUKaQKmAnO2k6f4sB1y6W/nIPlhuLogYfSRnJdIUbeFoL+2Q5x hOxiC0ZDuW8mC14qExJABgQLoBFo5erD5829GKzYZJNSU9tRsUDMUkFAUGE2MJ16siq/ HSEJDQNImAyxkfQ7tWJbwapssu/toq2RR/aR4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UuVW7tpTbDI/qssggkHCCe5zSzAPxwdivNU6kF+NI+c=; b=WugdlYxmFe4KENbZVJ5b7TGMJXkjJXeVhvpx4SPJOgYT4wB28V9FziHe2UDTggRHvx 6pjc3ydWsKRd5AeRS/shYdIdg9BQFJLuE9B/r89Gg7NiJKpxP2D1CWmOjuzpmp4KLTUU Xeu4yCC5uAphcTL7Joh4jLM8bYrt7xt9omZR5g9qGg0e5x5vNQ109YepPo5JZMA1hqV0 WWHzzK4ddhG+BtdcJvMtvj+rWOpANiyeE7f304+4sd9/o7K/kAMibIznjpiIFa9DiM0M IGLYgbNmYN684h++fl/DgyIjryI2LCzd5gtfF9oHUOid6CQj6BqOdiro76jY5pj+P+tk Xs8Q== X-Gm-Message-State: AJcUukeoPJhmqlPNZ+E78o51lhtiXkanMdZ4s7Ffj29S77qMO1bL525F iFjpqmaoryrZ2wWpfjabtgLuQlE2f+bP9A== X-Google-Smtp-Source: ALg8bN68+aY771zPojJjhbTNFEPMev9qkjU8s6fL88OzM2j0yHqY5NeqttO56MKFKrU4jfEGzQvQEw== X-Received: by 2002:adf:9d85:: with SMTP id p5mr37610285wre.41.1549037218532; Fri, 01 Feb 2019 08:06:58 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id n6sm2847250wmk.9.2019.02.01.08.06.57 for <qemu-devel@nongnu.org> (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 08:06:57 -0800 (PST) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Date: Fri, 1 Feb 2019 16:06:08 +0000 Message-Id: <20190201160653.13829-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190201160653.13829-1-peter.maydell@linaro.org> References: <20190201160653.13829-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::430 Subject: [Qemu-devel] [PULL 02/47] armv7m: Don't assume the NVIC's CPU is CPU 0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
[PULL,01/47] hw/arm/nrf51_soc: set object owner in memory_region_init_ram
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diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index f4446528307..f9aa83d20ef 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -178,10 +178,12 @@ static void armv7m_realize(DeviceState *dev, Error **errp) } } - /* Tell the CPU where the NVIC is; it will fail realize if it doesn't - * have one. + /* + * Tell the CPU where the NVIC is; it will fail realize if it doesn't + * have one. Similarly, tell the NVIC where its CPU is. */ s->cpu->env.nvic = &s->nvic; + s->nvic.cpu = s->cpu; object_property_set_bool(OBJECT(s->cpu), true, "realized", &err); if (err != NULL) { diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 0beefb05d44..790a3d95849 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2274,8 +2274,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) Error *err = NULL; int regionlen; - s->cpu = ARM_CPU(qemu_get_cpu(0)); - + /* The armv7m container object will have set our CPU pointer */ if (!s->cpu || !arm_feature(&s->cpu->env, ARM_FEATURE_M)) { error_setg(errp, "The NVIC can only be used with a Cortex-M CPU"); return;