From patchwork Mon Jan 21 13:15:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 1028657 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43jsY573qVz9s7h for ; Tue, 22 Jan 2019 00:17:45 +1100 (AEDT) Received: from localhost ([127.0.0.1]:53595 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glZSR-0006gT-SI for incoming@patchwork.ozlabs.org; Mon, 21 Jan 2019 08:17:43 -0500 Received: from eggs.gnu.org ([209.51.188.92]:45055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glZRS-0006dl-Te for qemu-devel@nongnu.org; Mon, 21 Jan 2019 08:16:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glZRQ-0004Gs-O3 for qemu-devel@nongnu.org; Mon, 21 Jan 2019 08:16:42 -0500 Received: from mail03.asahi-net.or.jp ([202.224.55.15]:42034) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glZRK-00043D-NG for qemu-devel@nongnu.org; Mon, 21 Jan 2019 08:16:36 -0500 Received: from h61-195-96-97.vps.ablenet.jp (h61-195-96-97.vps.ablenet.jp [61.195.96.97]) (Authenticated sender: PQ4Y-STU) by mail03.asahi-net.or.jp (Postfix) with ESMTPA id 2334B2395B; Mon, 21 Jan 2019 22:16:16 +0900 (JST) Received: from ysato.dip.jp (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by h61-195-96-97.vps.ablenet.jp (Postfix) with ESMTPSA id 80E6524008C; Mon, 21 Jan 2019 22:16:15 +0900 (JST) From: Yoshinori Sato To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 22:15:54 +0900 Message-Id: <20190121131602.55003-4-ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190121131602.55003-1-ysato@users.sourceforge.jp> References: <20190121131602.55003-1-ysato@users.sourceforge.jp> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 202.224.55.15 Subject: [Qemu-devel] [PATCH RFC 03/11] TCG helper functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yoshinori Sato Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Yoshinori Sato --- target/rx/helper.c | 143 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 target/rx/helper.c diff --git a/target/rx/helper.c b/target/rx/helper.c new file mode 100644 index 0000000000..1d00732c0c --- /dev/null +++ b/target/rx/helper.c @@ -0,0 +1,143 @@ +/* + * RX emulation + * + * Copyright (c) 2019 Yoshinori Sato + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" + +#include "cpu.h" +#include "exec/log.h" +#include "exec/cpu_ldst.h" +#include "sysemu/sysemu.h" + +void rx_cpu_do_interrupt(CPUState *cs) +{ + RXCPU *cpu = RXCPU(cs); + CPURXState *env = &cpu->env; + int do_irq = cs->interrupt_request & + (CPU_INTERRUPT_HARD | CPU_INTERRUPT_SOFT | CPU_INTERRUPT_FIR); + int irq_vector = -1; + + env->in_sleep = 0; + + if (do_irq & CPU_INTERRUPT_HARD) { + irq_vector = env->irq; + cs->interrupt_request &= ~CPU_INTERRUPT_HARD; + } + if (irq_vector == -1 && do_irq & CPU_INTERRUPT_SOFT) { + irq_vector = env->sirq; + cs->interrupt_request &= ~CPU_INTERRUPT_SOFT; + } + + if (qemu_loglevel_mask(CPU_LOG_INT)) { + if (cs->exception_index < 0x100) { + const char *expname; + switch (cs->exception_index) { + case 20: + expname = "previlage_violation"; + break; + case 21: + expname = "access_exception"; + break; + case 23: + expname = "illegal_instruction"; + break; + case 25: + expname = "fpu_exception"; + break; + case 30: + expname = "NMI_interrupt"; + break; + } + qemu_log("exception 0x%02x [%s] raised\n", + cs->exception_index, expname); + } else { + if (do_irq & CPU_INTERRUPT_FIR) + qemu_log("fast interrupt raised\n"); + else + qemu_log("interrupt 0x%02x raised\n", + irq_vector); + } + log_cpu_state(cs, 0); + } + if (env->psw_u) { + env->usp = env->regs[0]; + } else { + env->isp = env->regs[0]; + } + rx_cpu_pack_psw(env); + if ((do_irq & CPU_INTERRUPT_FIR) == 0) { + env->isp -= 4; + cpu_stl_all(env, env->isp, env->psw); + env->isp -= 4; + cpu_stl_all(env, env->isp, env->pc); + } else { + env->bpc = env->pc; + env->bpsw = env->psw; + } + env->psw_pm = env->psw_i = env->psw_u = 0; + env->regs[0] = env->isp; + if (do_irq) { + if (do_irq & CPU_INTERRUPT_FIR) { + env->pc = env->fintv; + env->psw_ipl = 15; + cs->interrupt_request &= ~CPU_INTERRUPT_FIR; + qemu_set_irq(env->ack, 0); + return; + } else if (do_irq & CPU_INTERRUPT_HARD) { + env->psw_ipl = env->intlevel; + qemu_set_irq(env->ack, 0); + } + env->pc = cpu_ldl_all(env, env->intb + irq_vector * 4); + return; + } else { + uint32_t vec = cs->exception_index; + env->pc = cpu_ldl_all(env, 0xffffffc0 + vec * 4); + return; + } +} + +bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request) +{ + RXCPU *cpu = RXCPU(cs); + CPURXState *env = &cpu->env; + int accept = 0; + /* software interrupt */ + if (interrupt_request & CPU_INTERRUPT_SOFT) { + accept = 1; + } + /* hardware interrupt (Normal) */ + if ((interrupt_request & CPU_INTERRUPT_HARD) && + env->psw_i && (env->psw_ipl < env->intlevel)) { + accept = 1; + } + /* hardware interrupt (FIR) */ + if ((interrupt_request & CPU_INTERRUPT_FIR) && + env->psw_i && (env->psw_ipl < 15)) { + accept = 1; + } + if (accept) { + rx_cpu_do_interrupt(cs); + return true; + } + return false; +} + +hwaddr rx_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) +{ + return addr; +}