[PULL,02/14] hw/riscv/virt: Adjust memory layout spacing

Message ID	20181221160307.14819-3-palmer@sifive.com
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> Date: Fri, 21 Dec 2018 08:02:55 -0800 Message-Id: <20181221160307.14819-3-palmer@sifive.com> In-Reply-To: <20181221160307.14819-1-palmer@sifive.com> References: <20181221160307.14819-1-palmer@sifive.com> From: Palmer Dabbelt <palmer@sifive.com> To: qemu-riscv@nongnu.org Subject: [Qemu-devel] [PULL 02/14] hw/riscv/virt: Adjust memory layout spacing Precedence: list Cc: Palmer Dabbelt <palmer@sifive.com>, Alistair Francis <alistair.francis@wdc.com>, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>
Series	[PR,RFC] RISC-V Changes for 3.2, Part 1 \| expand [PR,RFC] RISC-V Changes for 3.2, Part 1 [PULL,02/14] hw/riscv/virt: Adjust memory layout spacing [PULL,03/14] hw/riscv/virt: Connect the gpex PCIe [PULL,04/14] riscv: Enable VGA and PCIE_VGA [PULL,05/14] sifive_u: Add clock DT node for GEM ethernet [PULL,06/14] sifive_u: Set 'clock-frequency' DT property for SiFive UART [PULL,07/14] RISC-V: Add hartid and \n to interrupt logging [PULL,08/14] RISC-V: Fix CLINT timecmp low 32-bit writes [PULL,09/14] RISC-V: Fix PLIC pending bitfield reads [PULL,10/14] RISC-V: Enable second UART on sifive_e and sifive_u [PULL,11/14] sifive_uart: Implement interrupt pending register [PULL,12/14] target/riscv/pmp.c: Fix pmp_decode_napot() [PULL,13/14] riscv/cpu: use device_class_set_parent_realize [PULL,14/14] MAINTAINERS: Mark RISC-V as Supported

Message ID

20181221160307.14819-3-palmer@sifive.com

State

New

Headers

Date: Fri, 21 Dec 2018 08:02:55 -0800
Message-Id: <20181221160307.14819-3-palmer@sifive.com>
In-Reply-To: <20181221160307.14819-1-palmer@sifive.com>
References: <20181221160307.14819-1-palmer@sifive.com>
From: Palmer Dabbelt <palmer@sifive.com>
To: qemu-riscv@nongnu.org
Subject: [Qemu-devel] [PULL 02/14] hw/riscv/virt: Adjust memory layout
	spacing
Precedence: list
Cc: Palmer Dabbelt <palmer@sifive.com>,
	Alistair Francis <alistair.francis@wdc.com>, qemu-devel@nongnu.org
Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org
Sender: "Qemu-devel"
	<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>

Series

[PR,RFC] RISC-V Changes for 3.2, Part 1 | expand

Commit Message

Palmer Dabbelt Dec. 21, 2018, 4:02 p.m. UTC

From: Alistair Francis <Alistair.Francis@wdc.com>

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Andrea Bolognani <abologna@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 hw/riscv/virt.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 2b38f890702c..6b6fa39aaa38 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -47,14 +47,14 @@  static const struct MemmapEntry {
     hwaddr base;
     hwaddr size;
 } virt_memmap[] = {
-    [VIRT_DEBUG] =    {        0x0,      0x100 },
-    [VIRT_MROM] =     {     0x1000,    0x11000 },
-    [VIRT_TEST] =     {   0x100000,     0x1000 },
-    [VIRT_CLINT] =    {  0x2000000,    0x10000 },
-    [VIRT_PLIC] =     {  0xc000000,  0x4000000 },
-    [VIRT_UART0] =    { 0x10000000,      0x100 },
-    [VIRT_VIRTIO] =   { 0x10001000,     0x1000 },
-    [VIRT_DRAM] =     { 0x80000000,        0x0 },
+    [VIRT_DEBUG] =       {        0x0,         0x100 },
+    [VIRT_MROM] =        {     0x1000,       0x11000 },
+    [VIRT_TEST] =        {   0x100000,        0x1000 },
+    [VIRT_CLINT] =       {  0x2000000,       0x10000 },
+    [VIRT_PLIC] =        {  0xc000000,     0x4000000 },
+    [VIRT_UART0] =       { 0x10000000,         0x100 },
+    [VIRT_VIRTIO] =      { 0x10001000,        0x1000 },
+    [VIRT_DRAM] =        { 0x80000000,           0x0 },
 };
 
 static uint64_t load_kernel(const char *kernel_filename)

[PULL,02/14] hw/riscv/virt: Adjust memory layout spacing

Commit Message

Patch