From patchwork Fri Dec 21 05:45:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 1017288 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="Amg3fDSb"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43LdJf03mGz9s8r for ; Fri, 21 Dec 2018 17:00:18 +1100 (AEDT) Received: from localhost ([::1]:42443 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gaDr5-0002RG-Lf for incoming@patchwork.ozlabs.org; Fri, 21 Dec 2018 01:00:15 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gaDdm-0000ZK-CD for qemu-devel@nongnu.org; Fri, 21 Dec 2018 00:46:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gaDdl-0007Eg-CK for qemu-devel@nongnu.org; Fri, 21 Dec 2018 00:46:30 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:55987) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gaDdk-0006vL-UZ; Fri, 21 Dec 2018 00:46:29 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 43Ld0M6VLVz9sML; Fri, 21 Dec 2018 16:46:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1545371171; bh=8IXkfm5LRjlwonLnpL213IEsBGA9WHI1ar8wTHPa57E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Amg3fDSboHvs96BwsVVF47j4dnaRRjVs1KLscnSWoBNrpKmH0BwEJxZ1hSr6QAj62 3O+XbHH9dJEtoV25OtNgCrcMWS+Lnd9jT21ABhFJkiPcGtC7mQbd4lCENnBwQAGgBW O/jBJAchCTUd8HnUuqaTvth2BUmJ6UkDJUqFiOZQ= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 21 Dec 2018 16:45:35 +1100 Message-Id: <20181221054606.22007-10-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181221054606.22007-1-david@gibson.dropbear.id.au> References: <20181221054606.22007-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 09/40] ppc405_uc: use g_new(T, n) instead of g_malloc(sizeof(T) * n) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@redhat.com, lvivier@redhat.com, Greg Kurz , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Greg Kurz Because it is a recommended coding practice (see HACKING). Signed-off-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/ppc/ppc405_uc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 5c58415cf1..e1aadf126d 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1519,7 +1519,7 @@ CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem, /* OBP arbitrer */ ppc4xx_opba_init(0xef600600); /* Universal interrupt controller */ - irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); + irqs = g_new0(qemu_irq, PPCUIC_OUTPUT_NB); irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; irqs[PPCUIC_OUTPUT_CINT] = @@ -1877,7 +1877,7 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, /* Initialize timers */ ppc_booke_timers_init(cpu, sysclk, 0); /* Universal interrupt controller */ - irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); + irqs = g_new0(qemu_irq, PPCUIC_OUTPUT_NB); irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; irqs[PPCUIC_OUTPUT_CINT] =