Message ID | 20181213050453.9677-13-cota@braap.org |
---|---|
State | New |
Headers | show
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Cota" <cota@braap.org> To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 00:03:52 -0500 Message-Id: <20181213050453.9677-13-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181213050453.9677-1-cota@braap.org> References: <20181213050453.9677-1-cota@braap.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH v5 12/73] m68k: convert to helper_cpu_halted_set X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Laurent Vivier <laurent@vivier.eu> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
per-CPU locks
|
expand
|
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 752e46ef63..5bd4220e06 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -43,7 +43,6 @@ #undef DEFO32 #undef DEFO64 -static TCGv_i32 cpu_halted; static TCGv_i32 cpu_exception_index; static char cpu_reg_names[2 * 8 * 3 + 5 * 4]; @@ -79,9 +78,6 @@ void m68k_tcg_init(void) #undef DEFO32 #undef DEFO64 - cpu_halted = tcg_global_mem_new_i32(cpu_env, - -offsetof(M68kCPU, env) + - offsetof(CPUState, halted), "HALTED"); cpu_exception_index = tcg_global_mem_new_i32(cpu_env, -offsetof(M68kCPU, env) + offsetof(CPUState, exception_index), @@ -4637,6 +4633,7 @@ DISAS_INSN(halt) DISAS_INSN(stop) { uint16_t ext; + TCGv_i32 tmp; if (IS_USER(s)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); @@ -4646,7 +4643,9 @@ DISAS_INSN(stop) ext = read_im16(env, s); gen_set_sr_im(s, ext, 0); - tcg_gen_movi_i32(cpu_halted, 1); + tmp = tcg_const_i32(1); + gen_helper_cpu_halted_set(cpu_env, tmp); + tcg_temp_free_i32(tmp); gen_exception(s, s->pc, EXCP_HLT); }