From patchwork Tue Oct 30 09:30:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavel Dovgalyuk X-Patchwork-Id: 990687 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ispras.ru Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42kmS222F6z9s89 for ; Tue, 30 Oct 2018 20:31:14 +1100 (AEDT) Received: from localhost ([::1]:51796 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHQMh-0006m0-ST for incoming@patchwork.ozlabs.org; Tue, 30 Oct 2018 05:31:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52190) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHQML-0006lH-Bi for qemu-devel@nongnu.org; Tue, 30 Oct 2018 05:30:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHQMH-0001Pr-9u for qemu-devel@nongnu.org; Tue, 30 Oct 2018 05:30:49 -0400 Received: from mail.ispras.ru ([83.149.199.45]:34410) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHQMH-00018k-02 for qemu-devel@nongnu.org; Tue, 30 Oct 2018 05:30:45 -0400 Received: from [127.0.1.1] (unknown [85.142.117.226]) by mail.ispras.ru (Postfix) with ESMTPSA id AFEDA54006B; Tue, 30 Oct 2018 12:30:30 +0300 (MSK) From: Pavel Dovgalyuk To: qemu-devel@nongnu.org Date: Tue, 30 Oct 2018 12:30:31 +0300 Message-ID: <20181030093031.10131.17221.stgit@pasha-VirtualBox> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 83.149.199.45 Subject: [Qemu-devel] [PATCH] target/ppc: fix mtmsr instruction for icount X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maria.klimushenkova@ispras.ru, dovgaluk@ispras.ru, agraf@suse.de, pavel.dovgaluk@ispras.ru, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This patch fixes processing of mtmsr instructions in icount mode. In this mode writing to interrupt/peripheral state is controlled by can_do_io flag. This flag must be set explicitly before helper function invocation. Signed-off-by: Maria Klimushenkova Signed-off-by: Pavel Dovgalyuk Reviewed-by: Richard Henderson --- target/ppc/translate.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 4e59dd5..987ce6e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4257,11 +4257,17 @@ static void gen_mtmsrd(DisasContext *ctx) * if we enter power saving mode, we will exit the loop * directly from ppc_store_msr */ + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } gen_update_nip(ctx, ctx->base.pc_next); gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]); /* Must stop the translation as machine state (may have) changed */ /* Note that mtmsr is not always defined as context-synchronizing */ gen_stop_exception(ctx); + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_end(); + } } #endif /* !defined(CONFIG_USER_ONLY) */ } @@ -4286,6 +4292,9 @@ static void gen_mtmsr(DisasContext *ctx) * if we enter power saving mode, we will exit the loop * directly from ppc_store_msr */ + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } gen_update_nip(ctx, ctx->base.pc_next); #if defined(TARGET_PPC64) tcg_gen_deposit_tl(msr, cpu_msr, cpu_gpr[rS(ctx->opcode)], 0, 32); @@ -4293,6 +4302,9 @@ static void gen_mtmsr(DisasContext *ctx) tcg_gen_mov_tl(msr, cpu_gpr[rS(ctx->opcode)]); #endif gen_helper_store_msr(cpu_env, msr); + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_end(); + } tcg_temp_free(msr); /* Must stop the translation as machine state (may have) changed */ /* Note that mtmsr is not always defined as context-synchronizing */