| Message ID | 20181019010625.25294-38-cota@braap.org |
|---|---|
| State | New |
| Headers | show |
| Series | per-CPU locks | expand |
On 10/19/18 2:06 AM, Emilio G. Cota wrote: > @@ -60,7 +60,7 @@ static bool mips_cpu_has_work(CPUState *cs) > /* Prior to MIPS Release 6 it is implementation dependent if non-enabled > interrupts wake-up the CPU, however most of the implementations only > check for interrupts that can be taken. */ > - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && > + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && > cpu_mips_hw_interrupts_pending(env)) { > if (cpu_mips_hw_interrupts_enabled(env) || > (env->insn_flags & ISA_MIPS32R6)) { > @@ -72,7 +72,7 @@ static bool mips_cpu_has_work(CPUState *cs) > if (env->CP0_Config3 & (1 << CP0C3_MT)) { > /* The QEMU model will issue an _WAKE request whenever the CPUs > should be woken up. */ > - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { > + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { > has_work = true; > } > > @@ -82,7 +82,7 @@ static bool mips_cpu_has_work(CPUState *cs) > } > /* MIPS Release 6 has the ability to halt the CPU. */ > if (env->CP0_Config5 & (1 << CP0C5_VP)) { > - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { > + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { > has_work = true; > } > if (!mips_vp_active(env)) { Multiple calls. r~
On Sun, Oct 21, 2018 at 14:30:20 +0100, Richard Henderson wrote: > On 10/19/18 2:06 AM, Emilio G. Cota wrote: > > @@ -60,7 +60,7 @@ static bool mips_cpu_has_work(CPUState *cs) > > /* Prior to MIPS Release 6 it is implementation dependent if non-enabled > > interrupts wake-up the CPU, however most of the implementations only > > check for interrupts that can be taken. */ > > - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && > > + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && > > cpu_mips_hw_interrupts_pending(env)) { > > if (cpu_mips_hw_interrupts_enabled(env) || > > (env->insn_flags & ISA_MIPS32R6)) { > > @@ -72,7 +72,7 @@ static bool mips_cpu_has_work(CPUState *cs) > > if (env->CP0_Config3 & (1 << CP0C3_MT)) { > > /* The QEMU model will issue an _WAKE request whenever the CPUs > > should be woken up. */ > > - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { > > + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { > > has_work = true; > > } > > > > @@ -82,7 +82,7 @@ static bool mips_cpu_has_work(CPUState *cs) > > } > > /* MIPS Release 6 has the ability to halt the CPU. */ > > if (env->CP0_Config5 & (1 << CP0C5_VP)) { > > - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { > > + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { > > has_work = true; > > } > > if (!mips_vp_active(env)) { > > Multiple calls. Fixed, even though cpu_has_work ends up being called with the lock held later in the series. Thanks, E.
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 497706b669..e30aec6851 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -60,7 +60,7 @@ static bool mips_cpu_has_work(CPUState *cs) /* Prior to MIPS Release 6 it is implementation dependent if non-enabled interrupts wake-up the CPU, however most of the implementations only check for interrupts that can be taken. */ - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || (env->insn_flags & ISA_MIPS32R6)) { @@ -72,7 +72,7 @@ static bool mips_cpu_has_work(CPUState *cs) if (env->CP0_Config3 & (1 << CP0C3_MT)) { /* The QEMU model will issue an _WAKE request whenever the CPUs should be woken up. */ - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { has_work = true; } @@ -82,7 +82,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS Release 6 has the ability to halt the CPU. */ if (env->CP0_Config5 & (1 << CP0C5_VP)) { - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) { has_work = true; } if (!mips_vp_active(env)) { diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 0b177a7577..568c3d8f4a 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -135,7 +135,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) qemu_mutex_lock_iothread(); - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_io_interrupts_pending(cpu)) { intr.cpu = -1; intr.irq = 2;
Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Aleksandar Markovic <amarkovic@wavecomp.com> Cc: James Hogan <jhogan@kernel.org> Signed-off-by: Emilio G. Cota <cota@braap.org> --- target/mips/cpu.c | 6 +++--- target/mips/kvm.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)