From patchwork Fri Aug 10 03:01:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavel Zbitskiy X-Patchwork-Id: 955925 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="iCXhVKKe"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41mqpG2z6Fz9s2P for ; Fri, 10 Aug 2018 13:08:52 +1000 (AEST) Received: from localhost ([::1]:54025 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnxnF-0002Yz-TF for incoming@patchwork.ozlabs.org; Thu, 09 Aug 2018 23:08:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44078) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnxiP-000688-H7 for qemu-devel@nongnu.org; Thu, 09 Aug 2018 23:03:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnxiO-000482-5G for qemu-devel@nongnu.org; Thu, 09 Aug 2018 23:03:49 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:36208) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fnxiN-00046J-Uc; Thu, 09 Aug 2018 23:03:48 -0400 Received: by mail-qt0-x244.google.com with SMTP id t5-v6so8926499qtn.3; Thu, 09 Aug 2018 20:03:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zdQWDJOmUYpmFJBRbkyACEJ+k0XvtQEvzxuRCC+WAfA=; b=iCXhVKKehhd1VGJDR/Rf+A1pcDxzYaIR7NwwKFJC2tMLDeNPJzf3BYMxk7YkFrvxEy oeEgxI5v9kUU610bsz0TBRHTH/mApH8mixxmyyQ2To9c0YND7B30me5+BAf9u3P8ePvb sf0RTmtg6KVEQjyNmqFWe6Vkv5SeONH+f4udPP4RM5KXPOxVpxn2Zh04YxfIj4kTkbPY NEhXYtt2+3qFtN8RO1cXPuTdBXympYFiWsAXkbNk5taGcvePOvAT7CxeLnxRA0BpcaH/ ozouir0QwwHzZhF8w2j4MTZTLxgZ6R7bSoHt9kZjSQhuJ7NPR/95uFLJI3s/RRF12VLg Wk4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zdQWDJOmUYpmFJBRbkyACEJ+k0XvtQEvzxuRCC+WAfA=; b=IwVgcUVy1LzZEfj9xx0L6gyZCs2MZDEx6MoHCpkShN43u3X5u2uJzDbbHb/T6JvPZp GOC/KbZ9yCPmkz3pAQO07glio6pdi8UWDz34G13TaecXn2ha7b3lV8jsyYZeJt3emdgd COYfFSEj8HU+w4vwraeHWtBM/djsHyLvlY2GHURj9Y/QXrjLO9XUC3KU/sZo/kBv8YLM CVL6x+TQgRzZqAhWhAA+KYxeRpEsPhq06ALNxRovqySJ2m6OAUwyX8Rr4JpocyxPXz6m ROShQzWc97jTySbO3tDeODsoABUpfjbgZ41jqyGJPZ192Az+YNNhll8lVfjUOZxwnIWt 8IAw== X-Gm-Message-State: AOUpUlEm9fUqshVnCiwXMAPUxJL+sgcD0Ki2aoNUP+5hfAC1zNi0H6ga Rp6tXjjkBSGM7LoyAXEWwy8tHlcZFkA= X-Google-Smtp-Source: AA+uWPzkP9woSd8OxjVlQV8nwKa3A/aS5nBGMlC/1wbNlG4aA0bXeKY5mqO25z3aXU+s4bN2e+oUoA== X-Received: by 2002:aed:235a:: with SMTP id i26-v6mr4654121qtc.382.1533870226925; Thu, 09 Aug 2018 20:03:46 -0700 (PDT) Received: from WAL-L-PZ01.rocketsoftware.com ([2620:117:0:a::c]) by smtp.gmail.com with ESMTPSA id i1-v6sm4457425qtj.65.2018.08.09.20.03.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Aug 2018 20:03:46 -0700 (PDT) From: Pavel Zbitskiy To: qemu-devel@nongnu.org Date: Thu, 9 Aug 2018 23:01:37 -0400 Message-Id: <20180810030139.25916-6-pavel.zbitskiy@gmail.com> In-Reply-To: <20180810030139.25916-1-pavel.zbitskiy@gmail.com> References: <20180810030139.25916-1-pavel.zbitskiy@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 5/7] target/s390x: add EX support for TRT and TRTR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pavel Zbitskiy , david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, Alexander Graf , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Improves "b213c9f5: target/s390x: Implement TRTR" by introducing the intermediate functions, which are compatible with dx_helper type. Signed-off-by: Pavel Zbitskiy Reviewed-by: David Hildenbrand --- target/s390x/mem_helper.c | 16 +++++++++++ tests/tcg/s390x/Makefile.target | 2 ++ tests/tcg/s390x/exrl-trt.c | 48 +++++++++++++++++++++++++++++++++ tests/tcg/s390x/exrl-trtr.c | 48 +++++++++++++++++++++++++++++++++ 4 files changed, 114 insertions(+) create mode 100644 tests/tcg/s390x/exrl-trt.c create mode 100644 tests/tcg/s390x/exrl-trtr.c diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index c94dbf3fcb..704d0193b5 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1299,12 +1299,26 @@ static inline uint32_t do_helper_trt(CPUS390XState *env, int len, return 0; } +static uint32_t do_helper_trt_fwd(CPUS390XState *env, uint32_t len, + uint64_t array, uint64_t trans, + uintptr_t ra) +{ + return do_helper_trt(env, len, array, trans, 1, ra); +} + uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len, uint64_t array, uint64_t trans) { return do_helper_trt(env, len, array, trans, 1, GETPC()); } +static uint32_t do_helper_trt_bkwd(CPUS390XState *env, uint32_t len, + uint64_t array, uint64_t trans, + uintptr_t ra) +{ + return do_helper_trt(env, len, array, trans, -1, ra); +} + uint32_t HELPER(trtr)(CPUS390XState *env, uint32_t len, uint64_t array, uint64_t trans) { @@ -2193,12 +2207,14 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, uint64_t r1, uint64_t addr) typedef uint32_t (*dx_helper)(CPUS390XState *, uint32_t, uint64_t, uint64_t, uintptr_t); static const dx_helper dx[16] = { + [0x0] = do_helper_trt_bkwd, [0x2] = do_helper_mvc, [0x4] = do_helper_nc, [0x5] = do_helper_clc, [0x6] = do_helper_oc, [0x7] = do_helper_xc, [0xc] = do_helper_tr, + [0xd] = do_helper_trt_fwd, }; dx_helper helper = dx[opc & 0xf]; diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target index c800a582e5..7de4376f52 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -3,3 +3,5 @@ CFLAGS+=-march=zEC12 -m64 TESTS+=hello-s390x TESTS+=csst TESTS+=ipm +TESTS+=exrl-trt +TESTS+=exrl-trtr diff --git a/tests/tcg/s390x/exrl-trt.c b/tests/tcg/s390x/exrl-trt.c new file mode 100644 index 0000000000..3c5323aecb --- /dev/null +++ b/tests/tcg/s390x/exrl-trt.c @@ -0,0 +1,48 @@ +#include +#include + +int main(void) +{ + char op1[] = "hello"; + char op2[256]; + uint64_t r1 = 0xffffffffffffffffull; + uint64_t r2 = 0xffffffffffffffffull; + uint64_t cc; + int i; + + for (i = 0; i < 256; i++) { + if (i == 0) { + op2[i] = 0xaa; + } else { + op2[i] = 0; + } + } + asm volatile( + " j 2f\n" + "1: trt 0(1,%[op1]),0(%[op2])\n" + "2: exrl %[op1_len],1b\n" + " lgr %[r1],%%r1\n" + " lgr %[r2],%%r2\n" + " ipm %[cc]\n" + : [r1] "+r" (r1), + [r2] "+r" (r2), + [cc] "=r" (cc) + : [op1] "r" (&op1), + [op1_len] "r" (5), + [op2] "r" (&op2) + : "r1", "r2", "cc"); + cc = (cc >> 28) & 3; + if (cc != 2) { + write(1, "bad cc\n", 7); + return 1; + } + if ((char *)r1 != &op1[5]) { + write(1, "bad r1\n", 7); + return 1; + } + if (r2 != 0xffffffffffffffaaull) { + write(1, "bad r2\n", 7); + return 1; + } + return 0; +} diff --git a/tests/tcg/s390x/exrl-trtr.c b/tests/tcg/s390x/exrl-trtr.c new file mode 100644 index 0000000000..c33153ad7e --- /dev/null +++ b/tests/tcg/s390x/exrl-trtr.c @@ -0,0 +1,48 @@ +#include +#include + +int main(void) +{ + char op1[] = {0, 1, 2, 3}; + char op2[256]; + uint64_t r1 = 0xffffffffffffffffull; + uint64_t r2 = 0xffffffffffffffffull; + uint64_t cc; + int i; + + for (i = 0; i < 256; i++) { + if (i == 1) { + op2[i] = 0xbb; + } else { + op2[i] = 0; + } + } + asm volatile( + " j 2f\n" + "1: trtr 3(1,%[op1]),0(%[op2])\n" + "2: exrl %[op1_len],1b\n" + " lgr %[r1],%%r1\n" + " lgr %[r2],%%r2\n" + " ipm %[cc]\n" + : [r1] "+r" (r1), + [r2] "+r" (r2), + [cc] "=r" (cc) + : [op1] "r" (&op1), + [op1_len] "r" (3), + [op2] "r" (&op2) + : "r1", "r2", "cc"); + cc = (cc >> 28) & 3; + if (cc != 1) { + write(1, "bad cc\n", 7); + return 1; + } + if ((char *)r1 != &op1[1]) { + write(1, "bad r1\n", 7); + return 1; + } + if (r2 != 0xffffffffffffffbbull) { + write(1, "bad r2\n", 7); + return 1; + } + return 0; +}