| Message ID | 20180626161921.27941-2-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc improve atomic operations | expand |
On Tue, Jun 26, 2018 at 09:19:09AM -0700, Richard Henderson wrote: > This allows faults from MO_ALIGN to have the same effect > as from gen_check_align. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> So, most powerpc cpus can handle most unaligned accesses without an exception. I'm assuming this series won't preclude that? > --- > target/ppc/internal.h | 5 +++++ > target/ppc/excp_helper.c | 18 +++++++++++++++++- > target/ppc/translate_init.inc.c | 1 + > 3 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/target/ppc/internal.h b/target/ppc/internal.h > index 1f441c6483..a9bcadff42 100644 > --- a/target/ppc/internal.h > +++ b/target/ppc/internal.h > @@ -252,4 +252,9 @@ static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env) > void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); > void helper_compute_fprf_float32(CPUPPCState *env, float32 arg); > void helper_compute_fprf_float128(CPUPPCState *env, float128 arg); > + > +/* Raise a data fault alignment exception for the specified virtual address */ > +void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, > + MMUAccessType access_type, > + int mmu_idx, uintptr_t retaddr); > #endif /* PPC_INTERNAL_H */ > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index c092fbead0..d6e97a90e0 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -22,7 +22,7 @@ > #include "exec/helper-proto.h" > #include "exec/exec-all.h" > #include "exec/cpu_ldst.h" > - > +#include "internal.h" > #include "helper_regs.h" > > //#define DEBUG_OP > @@ -1198,3 +1198,19 @@ void helper_book3s_msgsnd(target_ulong rb) > qemu_mutex_unlock_iothread(); > } > #endif > + > +void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, > + MMUAccessType access_type, > + int mmu_idx, uintptr_t retaddr) > +{ > + CPUPPCState *env = cs->env_ptr; > + uint32_t insn; > + > + /* Restore state and reload the insn we executed, for filling in DSISR. */ > + cpu_restore_state(cs, retaddr, true); > + insn = cpu_ldl_code(env, env->nip); > + > + cs->exception_index = POWERPC_EXCP_ALIGN; > + env->error_code = insn & 0x03FF0000; > + cpu_loop_exit(cs); > +} > diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c > index 76d6f3fd5e..7813b1b004 100644 > --- a/target/ppc/translate_init.inc.c > +++ b/target/ppc/translate_init.inc.c > @@ -10457,6 +10457,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) > cc->set_pc = ppc_cpu_set_pc; > cc->gdb_read_register = ppc_cpu_gdb_read_register; > cc->gdb_write_register = ppc_cpu_gdb_write_register; > + cc->do_unaligned_access = ppc_cpu_do_unaligned_access; > #ifdef CONFIG_USER_ONLY > cc->handle_mmu_fault = ppc_cpu_handle_mmu_fault; > #else
On 06/27/2018 02:09 AM, David Gibson wrote: > On Tue, Jun 26, 2018 at 09:19:09AM -0700, Richard Henderson wrote: >> This allows faults from MO_ALIGN to have the same effect >> as from gen_check_align. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > So, most powerpc cpus can handle most unaligned accesses without an > exception. I'm assuming this series won't preclude that? Correct. This hook will only fire when using MO_ALIGN to request an alignment check. r~
On Wed, Jun 27, 2018 at 06:52:49AM -0700, Richard Henderson wrote: > On 06/27/2018 02:09 AM, David Gibson wrote: > > On Tue, Jun 26, 2018 at 09:19:09AM -0700, Richard Henderson wrote: > >> This allows faults from MO_ALIGN to have the same effect > >> as from gen_check_align. > >> > >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > > > So, most powerpc cpus can handle most unaligned accesses without an > > exception. I'm assuming this series won't preclude that? > > Correct. This hook will only fire when using MO_ALIGN to > request an alignment check. Thanks for the confirmation, first patch applied to ppc-for-3.0. Continuing to look at the rest.
diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 1f441c6483..a9bcadff42 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -252,4 +252,9 @@ static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env) void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); void helper_compute_fprf_float32(CPUPPCState *env, float32 arg); void helper_compute_fprf_float128(CPUPPCState *env, float128 arg); + +/* Raise a data fault alignment exception for the specified virtual address */ +void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr); #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index c092fbead0..d6e97a90e0 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -22,7 +22,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" - +#include "internal.h" #include "helper_regs.h" //#define DEBUG_OP @@ -1198,3 +1198,19 @@ void helper_book3s_msgsnd(target_ulong rb) qemu_mutex_unlock_iothread(); } #endif + +void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr) +{ + CPUPPCState *env = cs->env_ptr; + uint32_t insn; + + /* Restore state and reload the insn we executed, for filling in DSISR. */ + cpu_restore_state(cs, retaddr, true); + insn = cpu_ldl_code(env, env->nip); + + cs->exception_index = POWERPC_EXCP_ALIGN; + env->error_code = insn & 0x03FF0000; + cpu_loop_exit(cs); +} diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 76d6f3fd5e..7813b1b004 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10457,6 +10457,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->set_pc = ppc_cpu_set_pc; cc->gdb_read_register = ppc_cpu_gdb_read_register; cc->gdb_write_register = ppc_cpu_gdb_write_register; + cc->do_unaligned_access = ppc_cpu_do_unaligned_access; #ifdef CONFIG_USER_ONLY cc->handle_mmu_fault = ppc_cpu_handle_mmu_fault; #else
This allows faults from MO_ALIGN to have the same effect as from gen_check_align. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/ppc/internal.h | 5 +++++ target/ppc/excp_helper.c | 18 +++++++++++++++++- target/ppc/translate_init.inc.c | 1 + 3 files changed, 23 insertions(+), 1 deletion(-)