diff mbox series

[PULL,03/28] target/ppc: drop empty #if/#endif block

Message ID	20180618035324.19907-4-david@gibson.dropbear.id.au
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> From: David Gibson <david@gibson.dropbear.id.au> To: peter.maydell@linaro.org Date: Mon, 18 Jun 2018 13:52:59 +1000 Message-Id: <20180618035324.19907-4-david@gibson.dropbear.id.au> In-Reply-To: <20180618035324.19907-1-david@gibson.dropbear.id.au> References: <20180618035324.19907-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 03/28] target/ppc: drop empty #if/#endif block Precedence: list Cc: aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson <david@gibson.dropbear.id.au> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>
Series	[PULL,01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache \| expand [PULL,01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache [PULL,02/28] ppc/spapr_caps: Don't disable cap_cfpc on POWER8 by default [PULL,03/28] target/ppc: drop empty #if/#endif block [PULL,04/28] spapr: fix leak in h_client_architecture_support() [PULL,05/28] ppc: introduce Core99MachinesState for the mac99 machine [PULL,06/28] mac_newworld: add via machine option to control mac99 VIA/ADB configuration [PULL,07/28] mac_newworld: add gpios to macio devices with PMU enabled [PULL,08/28] mac_newworld: wire up programmer switch to NMI handler [PULL,09/28] adb: fix read reg 3 byte ordering [PULL,10/28] adb: add property to disable direct reg 3 writes [PULL,11/28] mac_newworld: add PMU device [PULL,12/28] xics_kvm: fix a build break [PULL,13/28] mos6522: only clear the shift register interrupt upon write [PULL,14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq() [PULL,15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass [PULL,16/28] sm501: Do not clear read only bits when writing registers [PULL,17/28] spapr: Clean up cpu realize/unrealize paths [PULL,18/28] pnv: Fix some error handling cpu realize() [PULL,19/28] pnv_core: Allocate cpu thread objects individually [PULL,20/28] pnv: Clean up cpu realize path [PULL,21/28] pnv: Add cpu unrealize path [PULL,22/28] spapr_cpu_core: convert last snprintf() to g_strdup_printf() [PULL,23/28] spapr_cpu_core: fix potential leak in spapr_cpu_core_realize() [PULL,24/28] spapr_cpu_core: add missing rollback on realization path [PULL,25/28] spapr_cpu_core: introduce spapr_create_vcpu() [PULL,26/28] ppc/pnv: introduce a pnv_chip_core_realize() routine [PULL,27/28] target/ppc, spapr: Move VPA information to machine_data [PULL,28/28] spapr: fix xics_system_init() error path

Commit Message

David Gibson June 18, 2018, 3:52 a.m. UTC

From: Greg Kurz <groug@kaod.org>

Commit 9d6f106552fa moved the last line in this block to somewhere else,
but it forgot to remove the now useless #if/#endif.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target/ppc/cpu.h | 2 --
 1 file changed, 2 deletions(-)

diff mbox series

Patch

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 0247c1f04c..a91f1a8777 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1300,8 +1300,6 @@  void ppc_store_ptcr(CPUPPCState *env, target_ulong value);
 void ppc_store_msr (CPUPPCState *env, target_ulong value);
 
 void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf);
-#if defined(TARGET_PPC64)
-#endif
 
 /* Time-base and decrementer management */
 #ifndef NO_CPU_IO_DEFS