| Message ID | 20180512004311.9299-21-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | softfloat patch roundup | expand |
On Sat, May 12, 2018 at 12:43 PM, Richard Henderson < richard.henderson@linaro.org> wrote: > This is now handled properly by the generic softfloat code. > > Cc: Michael Clark <mjc@sifive.com> > Cc: Palmer Dabbelt <palmer@sifive.com> > Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> > Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > Reviewed-by: Michael Clark <mjc@sifive.com> --- > target/riscv/fpu_helper.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c > index abbadead5c..fdb87d8d82 100644 > --- a/target/riscv/fpu_helper.c > +++ b/target/riscv/fpu_helper.c > @@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t > frs1, uint64_t frs2) > > uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) > { > - rs1 = float64_to_float32(rs1, &env->fp_status); > - return float32_maybe_silence_nan(rs1, &env->fp_status); > + return float64_to_float32(rs1, &env->fp_status); > } > > uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) > { > - rs1 = float32_to_float64(rs1, &env->fp_status); > - return float64_maybe_silence_nan(rs1, &env->fp_status); > + return float32_to_float64(rs1, &env->fp_status); > } > > uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1) > -- > 2.17.0 > >
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index abbadead5c..fdb87d8d82 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) { - rs1 = float64_to_float32(rs1, &env->fp_status); - return float32_maybe_silence_nan(rs1, &env->fp_status); + return float64_to_float32(rs1, &env->fp_status); } uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) { - rs1 = float32_to_float64(rs1, &env->fp_status); - return float64_maybe_silence_nan(rs1, &env->fp_status); + return float32_to_float64(rs1, &env->fp_status); } uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1)
This is now handled properly by the generic softfloat code. Cc: Michael Clark <mjc@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/riscv/fpu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)