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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id l90sm60332813pfb.149.2018.05.09.10.55.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 09 May 2018 10:55:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 9 May 2018 10:54:37 -0700 Message-Id: <20180509175458.15642-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180509175458.15642-1-richard.henderson@linaro.org> References: <20180509175458.15642-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PULL 07/28] target/microblaze: avoid integer overflow in next_page PC check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Sagar Karandikar , David Hildenbrand , Palmer Dabbelt , Mark Cave-Ayland , Max Filippov , Michael Clark , "Edgar E. Iglesias" , Guan Xuetao , Yongbok Kim , Alexander Graf , "Emilio G. Cota" , Richard Henderson , Artyom Tarasenko , Eduardo Habkost , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Stafford Horne , David Gibson , Peter Crosthwaite , Bastian Koppelmann , Cornelia Huck , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" If the PC is in the last page of the address space, next_page_start overflows to 0. Fix it. Reviewed-by: Richard Henderson Cc: "Edgar E. Iglesias" Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 100883e2cc..0872dc9ded 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1635,7 +1635,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) uint32_t pc_start; struct DisasContext ctx; struct DisasContext *dc = &ctx; - uint32_t next_page_start, org_flags; + uint32_t page_start, org_flags; target_ulong npc; int num_insns; int max_insns; @@ -1661,7 +1661,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) cpu_abort(cs, "Microblaze: unaligned PC=%x\n", pc_start); } - next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; + page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; max_insns = tb_cflags(tb) & CF_COUNT_MASK; if (max_insns == 0) { @@ -1747,7 +1747,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) } while (!dc->is_jmp && !dc->cpustate_changed && !tcg_op_buf_full() && !singlestep - && (dc->pc < next_page_start) + && (dc->pc - page_start < TARGET_PAGE_SIZE) && num_insns < max_insns); npc = dc->pc;