| Message ID | 20180208173157.24705-12-alex.bennee@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add ARMv8.2 half-precision functions | expand |
On 02/08/2018 09:31 AM, Alex Bennée wrote: > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/arm/helper-a64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++ > target/arm/helper-a64.h | 5 +++++ > target/arm/translate-a64.c | 15 ++++++++++++++ > 3 files changed, 69 insertions(+) > > diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c > index 25e45121af..78eeda31d1 100644 > --- a/target/arm/helper-a64.c > +++ b/target/arm/helper-a64.c > @@ -599,3 +599,52 @@ ADVSIMD_HALFOP(min) > ADVSIMD_HALFOP(max) > ADVSIMD_HALFOP(minnum) > ADVSIMD_HALFOP(maxnum) > + > +/* > + * Floating point comparisons produce an integer result. Softfloat > + * routines return float_relation types which we convert to the 0/-1 > + * Neon requires. > + */ > + > +#define ADVSIMD_CMPRES(test) (test) ? 0xffff : 0 > + > +uint32_t HELPER(advsimd_ceq_f16)(float16 a, float16 b, void *fpstp) > +{ > + float_status *fpst = fpstp; > + int compare = float16_compare_quiet(a, b, fpst); > + return ADVSIMD_CMPRES(compare == float_relation_equal); Not using float16_eq etc? > +} > + > +uint32_t HELPER(advsimd_cge_f16)(float16 a, float16 b, void *fpstp) > +{ > + float_status *fpst = fpstp; > + int compare = float16_compare(a, b, fpst); > + return ADVSIMD_CMPRES(compare == float_relation_greater || > + compare == float_relation_equal); Especially float16_le(b, a, fpst). Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
Richard Henderson <richard.henderson@linaro.org> writes: > On 02/08/2018 09:31 AM, Alex Bennée wrote: >> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> >> --- >> target/arm/helper-a64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++ >> target/arm/helper-a64.h | 5 +++++ >> target/arm/translate-a64.c | 15 ++++++++++++++ >> 3 files changed, 69 insertions(+) >> >> diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c >> index 25e45121af..78eeda31d1 100644 >> --- a/target/arm/helper-a64.c >> +++ b/target/arm/helper-a64.c >> @@ -599,3 +599,52 @@ ADVSIMD_HALFOP(min) >> ADVSIMD_HALFOP(max) >> ADVSIMD_HALFOP(minnum) >> ADVSIMD_HALFOP(maxnum) >> + >> +/* >> + * Floating point comparisons produce an integer result. Softfloat >> + * routines return float_relation types which we convert to the 0/-1 >> + * Neon requires. >> + */ >> + >> +#define ADVSIMD_CMPRES(test) (test) ? 0xffff : 0 >> + >> +uint32_t HELPER(advsimd_ceq_f16)(float16 a, float16 b, void *fpstp) >> +{ >> + float_status *fpst = fpstp; >> + int compare = float16_compare_quiet(a, b, fpst); >> + return ADVSIMD_CMPRES(compare == float_relation_equal); > > Not using float16_eq etc? These don't actually exist. But I guess we could make stubs for them based on the generic float_compare support. But would it buy us much? > >> +} >> + >> +uint32_t HELPER(advsimd_cge_f16)(float16 a, float16 b, void *fpstp) >> +{ >> + float_status *fpst = fpstp; >> + int compare = float16_compare(a, b, fpst); >> + return ADVSIMD_CMPRES(compare == float_relation_greater || >> + compare == float_relation_equal); > > Especially float16_le(b, a, fpst). > > Otherwise, > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > > > r~ -- Alex Bennée
On 02/23/2018 03:59 AM, Alex Bennée wrote: >> Not using float16_eq etc? > > These don't actually exist. Ah. > But I guess we could make stubs for them > based on the generic float_compare support. But would it buy us much? ... >>> + return ADVSIMD_CMPRES(compare == float_relation_greater || >>> + compare == float_relation_equal); >> >> Especially float16_le(b, a, fpst). It buys us knowledge of the float_relation_* values, such that instead of the two comparisons above you can use <= 0 (note that this only works for le not ge, because of float_relation_unordered == 2). I'll grant you that two compares vs one isn't much, but it is simpler... r~
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 25e45121af..78eeda31d1 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -599,3 +599,52 @@ ADVSIMD_HALFOP(min) ADVSIMD_HALFOP(max) ADVSIMD_HALFOP(minnum) ADVSIMD_HALFOP(maxnum) + +/* + * Floating point comparisons produce an integer result. Softfloat + * routines return float_relation types which we convert to the 0/-1 + * Neon requires. + */ + +#define ADVSIMD_CMPRES(test) (test) ? 0xffff : 0 + +uint32_t HELPER(advsimd_ceq_f16)(float16 a, float16 b, void *fpstp) +{ + float_status *fpst = fpstp; + int compare = float16_compare_quiet(a, b, fpst); + return ADVSIMD_CMPRES(compare == float_relation_equal); +} + +uint32_t HELPER(advsimd_cge_f16)(float16 a, float16 b, void *fpstp) +{ + float_status *fpst = fpstp; + int compare = float16_compare(a, b, fpst); + return ADVSIMD_CMPRES(compare == float_relation_greater || + compare == float_relation_equal); +} + +uint32_t HELPER(advsimd_cgt_f16)(float16 a, float16 b, void *fpstp) +{ + float_status *fpst = fpstp; + int compare = float16_compare(a, b, fpst); + return ADVSIMD_CMPRES(compare == float_relation_greater); +} + +uint32_t HELPER(advsimd_acge_f16)(float16 a, float16 b, void *fpstp) +{ + float_status *fpst = fpstp; + float16 f0 = float16_abs(a); + float16 f1 = float16_abs(b); + int compare = float16_compare(f0, f1, fpst); + return ADVSIMD_CMPRES(compare == float_relation_greater || + compare == float_relation_equal); +} + +uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp) +{ + float_status *fpst = fpstp; + float16 f0 = float16_abs(a); + float16 f1 = float16_abs(b); + int compare = float16_compare(f0, f1, fpst); + return ADVSIMD_CMPRES(compare == float_relation_greater); +} diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index 5cbabcc27a..e701644ae7 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -57,3 +57,8 @@ DEF_HELPER_3(advsimd_maxh, f16, f16, f16, ptr) DEF_HELPER_3(advsimd_minh, f16, f16, f16, ptr) DEF_HELPER_3(advsimd_maxnumh, f16, f16, f16, ptr) DEF_HELPER_3(advsimd_minnumh, f16, f16, f16, ptr) +DEF_HELPER_3(advsimd_ceq_f16, i32, f16, f16, ptr) +DEF_HELPER_3(advsimd_cge_f16, i32, f16, f16, ptr) +DEF_HELPER_3(advsimd_cgt_f16, i32, f16, f16, ptr) +DEF_HELPER_3(advsimd_acge_f16, i32, f16, f16, ptr) +DEF_HELPER_3(advsimd_acgt_f16, i32, f16, f16, ptr) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 93d71d8b2c..14572f26e1 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -9855,6 +9855,9 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn) case 0x2: /* FADD */ gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); break; + case 0x4: /* FCMEQ */ + gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst); + break; case 0x6: /* FMAX */ gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); break; @@ -9870,6 +9873,12 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn) case 0x13: /* FMUL */ gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); break; + case 0x14: /* FCMGE */ + gen_helper_advsimd_cge_f16(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x15: /* FACGE */ + gen_helper_advsimd_acge_f16(tcg_res, tcg_op1, tcg_op2, fpst); + break; case 0x17: /* FDIV */ gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); break; @@ -9877,6 +9886,12 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn) gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); gen_helper_advsimd_absh(tcg_res, tcg_res); break; + case 0x1c: /* FCMGT */ + gen_helper_advsimd_cgt_f16(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1d: /* FACGT */ + gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst); + break; default: fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n", __func__, insn, fpopcode, s->pc);
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- target/arm/helper-a64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++ target/arm/helper-a64.h | 5 +++++ target/arm/translate-a64.c | 15 ++++++++++++++ 3 files changed, 69 insertions(+)