From patchwork Wed Jan 17 17:40:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 862459 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zMF1F6LGMz9s7f for ; Thu, 18 Jan 2018 04:48:01 +1100 (AEDT) Received: from localhost ([::1]:51079 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebroe-0005oK-1T for incoming@patchwork.ozlabs.org; Wed, 17 Jan 2018 12:48:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46778) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebriO-0008Vl-Gl for qemu-devel@nongnu.org; Wed, 17 Jan 2018 12:41:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebriL-0007s7-BV for qemu-devel@nongnu.org; Wed, 17 Jan 2018 12:41:32 -0500 Received: from mx1.redhat.com ([209.132.183.28]:44706) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebriL-0007qw-66; Wed, 17 Jan 2018 12:41:29 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 288DBC056820; Wed, 17 Jan 2018 17:41:28 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-185.ams2.redhat.com [10.36.117.185]) by smtp.corp.redhat.com (Postfix) with ESMTP id 25F8A5D756; Wed, 17 Jan 2018 17:41:25 +0000 (UTC) From: David Hildenbrand To: qemu-s390x@nongnu.org, qemu-devel@nongnu.org Date: Wed, 17 Jan 2018 18:40:36 +0100 Message-Id: <20180117174047.6382-8-david@redhat.com> In-Reply-To: <20180117174047.6382-1-david@redhat.com> References: <20180117174047.6382-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 17 Jan 2018 17:41:28 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 07/18] s390x/tcg: tolerate wrong wakeups due to floating interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Alexander Graf , Christian Borntraeger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is a prparation for floating interrupt support and only applies to MTTCG, single threaded TCG works just fine. If a floating interrupt wakes up a VCPU and the CPU thinks it can run (clearing cs->halted), at the point where the interrupt would be delivered, already another VCPU might have picked up the interrupt, resulting in a wakeup without an interrupt (executing wrong code). It is wrong to let the VCPU continue to execute (the WAIT PSW). Instead, we have to put the VCPU back to sleep. Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index a18842ccbd..eeffb49f63 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -503,6 +503,11 @@ bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request) s390_cpu_do_interrupt(cs); return true; } + if (env->psw.mask & PSW_MASK_WAIT) { + /* Woken up because of a floating interrupt but it has already + * been delivered. Go back to sleep. */ + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT); + } } return false; }