Message ID | 20180108180231.21122-6-f4bug@amsat.org |
---|---|
State | New |
Headers | show |
Series | use QEMU_PACKED and QEMU_ALIGNED macros | expand |
On 01/08/2018 10:02 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/net/eepro100.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index a07a63247e..61d767524f 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -266,7 +266,7 @@ typedef struct { /* Data in mem is always in the byte order of the controller (le). * It must be dword aligned to allow direct access to 32 bit values. */ - uint8_t mem[PCI_MEM_SIZE] __attribute__((aligned(8))); + uint8_t mem[PCI_MEM_SIZE] QEMU_ALIGNED(8); /* Configuration bytes. */ uint8_t configuration[22];
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/net/eepro100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)