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X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PATCH v5 11/31] hw/arm/exynos4210: use the "samsung, exynos4210-dw-mshc" device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Prasad J Pandit , =?utf-8?q?Gr=C3=A9gory_Estrade?= , qemu-devel@nongnu.org, Peter Crosthwaite , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski , Jean-Christophe Dubois , Sai Pavan Boddu , qemu-arm@nongnu.org, Clement Deschamps , Andrew Baumann , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/exynos4210.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index e8e1d81e62..eb95131221 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -75,7 +75,6 @@ #define EXYNOS4210_INT_COMBINER_BASE_ADDR 0x10448000 /* SD/MMC host controllers */ -#define EXYNOS4210_SDHCI_CAPABILITIES 0x05E80080 #define EXYNOS4210_SDHCI_BASE_ADDR 0x12510000 #define EXYNOS4210_SDHCI_ADDR(n) (EXYNOS4210_SDHCI_BASE_ADDR + \ 0x00010000 * (n)) @@ -377,13 +376,10 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) BlockBackend *blk; DriveInfo *di; - dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI); - qdev_prop_set_uint32(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES); - qdev_init_nofail(dev); - - busdev = SYS_BUS_DEVICE(dev); - sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n)); - sysbus_connect_irq(busdev, 0, s->irq_table[exynos4210_get_irq(29, n)]); + dev = sysbus_create_varargs("samsung,exynos4210-dw-mshc", + EXYNOS4210_SDHCI_ADDR(n), + s->irq_table[exynos4210_get_irq(29, n)], + NULL); di = drive_get(IF_SD, 0, n); blk = di ? blk_by_legacy_dinfo(di) : NULL;