@@ -272,8 +272,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
MemoryRegion *ram_memory);
PCIBus *find_i440fx(void);
-/* piix4.c */
-extern PCIDevice *piix4_dev;
/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory,
new file mode 100644
@@ -0,0 +1,17 @@
+/*
+ * Intel 82371 PIIX South Bridge Emulation
+ *
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#ifndef HW_ISA_PIIX_H
+#define HW_ISA_PIIX_H
+
+#include "hw/pci/pci.h"
+
+/* piix4.c */
+extern PCIDevice *piix4_dev;
+
+#endif /* HW_ISA_PIIX_H */
@@ -28,6 +28,7 @@
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
+#include "hw/southbridge/i82371_piix.h"
#include "hw/sysbus.h"
PCIDevice *piix4_dev;
@@ -28,6 +28,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/i386/pc.h"
+#include "hw/southbridge/i82371_piix.h"
#include "exec/address-spaces.h"
//#define DEBUG
@@ -888,6 +888,7 @@ F: include/hw/dma/i8257.h
F: include/hw/i2c/pm_smbus.h
F: include/hw/isa/superio.h
F: include/hw/input/i8042.h
+F: include/hw/southbridge/i82371_piix.h
F: include/hw/timer/hpet.h
F: include/hw/timer/i8254*
F: include/hw/timer/mc146818rtc*
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- include/hw/i386/pc.h | 2 -- include/hw/southbridge/i82371_piix.h | 17 +++++++++++++++++ hw/isa/piix4.c | 1 + hw/mips/gt64xxx_pci.c | 1 + MAINTAINERS | 1 + 5 files changed, 20 insertions(+), 2 deletions(-) create mode 100644 include/hw/southbridge/i82371_piix.h