From patchwork Fri Dec 29 06:31:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 853666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="cwPE25+S"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3z7HSn34vjz9s74 for ; Fri, 29 Dec 2017 17:56:57 +1100 (AEDT) Received: from localhost ([::1]:57104 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eUob9-0007Rn-G9 for incoming@patchwork.ozlabs.org; Fri, 29 Dec 2017 01:56:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eUoDU-0003Hp-83 for qemu-devel@nongnu.org; Fri, 29 Dec 2017 01:32:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eUoDS-0004pl-H6 for qemu-devel@nongnu.org; Fri, 29 Dec 2017 01:32:28 -0500 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:39282) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eUoDS-0004pX-An for qemu-devel@nongnu.org; Fri, 29 Dec 2017 01:32:26 -0500 Received: by mail-pg0-x243.google.com with SMTP id 81so1174226pgf.6 for ; Thu, 28 Dec 2017 22:32:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zl3C+FQVlwdmIMJEoCeZYauFLkfZtyG+hfip+VsvAF0=; b=cwPE25+SdeDTeRjhmKDMLSdvecUgHOJPg/ypc02qT0Hv/aMbEbMBNAsK08hlpgtue8 MnayXpvfeUljKCCAWxHGLqHfhTvOTjo+mTckkx3FiUZcm0CsenINpye80RIYhQr92WKH VInuL39wNcRzBible1OZBVFBJyG2PPdWMzq4E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zl3C+FQVlwdmIMJEoCeZYauFLkfZtyG+hfip+VsvAF0=; b=l7dapp0PFmobj1+RN2I4s0QdXlxcEa40p38l8iopCyKQuwnRQOXHcYJe5ot8RA+yf8 toexFISna/GBmqBH2LJB5deEAuNYU1MBueKq1zBvh74EUOf0RWRq1hcZ75HbilglABYw dIyYO5P0DxVPrkxB2UkRnQH9NVe+VZETfDvuO9xHmqctIpcpBKltIBDEUzuiXa2m870X p3y0g4hD1VhubyAlcL8ZpvFO3g/LA/of2wssNV0ixlD+c3ktGjjjc1La7VNko2BYgGH4 YK2W6s+YUilXTyLeVD/qCCiSJnFo3cOjxLeZrcHl0BKnkevv5LF54MVZnrKa5pyFdJZE WVqQ== X-Gm-Message-State: AKGB3mLUQY37t+DI/LRWOyESYPilUJYQStDBn2EVQG/qdWtweJoylxBS rAs3siBoylr8GIOxYuJcefsWaWvscPc= X-Google-Smtp-Source: ACJfBou4awcGoAZR/ibMo/v9TnI95qT5sFf3mXSzLbtW/akNVvuUtCO7X3Bh73FRYE350UC8bFSANQ== X-Received: by 10.99.51.205 with SMTP id z196mr5249859pgz.441.1514529145026; Thu, 28 Dec 2017 22:32:25 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-183-164.tukw.qwest.net. [97.113.183.164]) by smtp.gmail.com with ESMTPSA id c28sm76539063pfe.69.2017.12.28.22.32.23 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Dec 2017 22:32:24 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 28 Dec 2017 22:31:35 -0800 Message-Id: <20171229063145.29167-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171229063145.29167-1-richard.henderson@linaro.org> References: <20171229063145.29167-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH 28/38] target/hppa: Implement a halt instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: deller@gmx.de Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Real hardware would use an external device to control the power. But for the moment let's invent an instruction in reserved space. Suggested-by: Helge Deller Signed-off-by: Richard Henderson --- target/hppa/helper.h | 1 + target/hppa/op_helper.c | 7 +++++++ target/hppa/translate.c | 18 +++++++++++++++++- 3 files changed, 25 insertions(+), 1 deletion(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 1e733b7926..6e86c596fe 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -80,6 +80,7 @@ DEF_HELPER_FLAGS_4(fmpynfadd_d, TCG_CALL_NO_RWG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_0(read_interval_timer, TCG_CALL_NO_RWG, tr) #ifndef CONFIG_USER_ONLY +DEF_HELPER_1(shutdown, noreturn, env) DEF_HELPER_1(rfi, void, env) DEF_HELPER_1(rfi_r, void, env) DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tr) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index d270f94e31..88be2ebf24 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -22,6 +22,7 @@ #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" +#include "sysemu/sysemu.h" #include "qemu/timer.h" @@ -639,6 +640,12 @@ void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val) timer_mod(cpu->alarm_timer, timeout); } +void HELPER(shutdown)(CPUHPPAState *env) +{ + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); + helper_excp(env, EXCP_HLT); +} + target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm) { target_ulong psw = env->psw; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 00a8c26afa..68f0b86c72 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2293,6 +2293,14 @@ static DisasJumpType trans_rfi(DisasContext *ctx, uint32_t insn, /* Exit the TB to recognize new interrupts. */ return nullify_end(ctx, DISAS_NORETURN); } + +static DisasJumpType gen_hlt(DisasContext *ctx) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + nullify_over(ctx); + gen_helper_shutdown(cpu_env); + return nullify_end(ctx, DISAS_NORETURN); +} #endif /* !CONFIG_USER_ONLY */ static const DisasInsn table_system[] = { @@ -4510,7 +4518,15 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) case 0x15: /* unassigned */ case 0x1D: /* unassigned */ case 0x37: /* unassigned */ - case 0x3F: /* unassigned */ + break; + case 0x3F: +#ifndef CONFIG_USER_ONLY + /* Unassigned, but use as system-halt. */ + if (insn == 0xffffffff) { + return gen_hlt(ctx); + } +#endif + break; default: break; }