From patchwork Sun Dec 17 05:49:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 849593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="kZvyl0Tj"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yztYh2D4Qz9sBW for ; Sun, 17 Dec 2017 16:50:32 +1100 (AEDT) Received: from localhost ([::1]:53204 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQRqI-0001a2-9w for incoming@patchwork.ozlabs.org; Sun, 17 Dec 2017 00:50:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43261) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQRpo-0001Ze-D0 for qemu-devel@nongnu.org; Sun, 17 Dec 2017 00:50:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQRpl-0005Wj-Am for qemu-devel@nongnu.org; Sun, 17 Dec 2017 00:50:00 -0500 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:39677) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eQRpl-0005WT-3i; Sun, 17 Dec 2017 00:49:57 -0500 Received: by mail-wr0-x243.google.com with SMTP id a41so11268603wra.6; Sat, 16 Dec 2017 21:49:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=kYw5Jj6gmsJGrO+WksZ+sUE+fk6yaROM2YXR2t8mjkg=; b=kZvyl0Tjov8R2tgF8vcFFKu+s25BxDxnGUxAOXxcDXGD+kIgg976bpWEj8qMpBGviM 4Vu09uIPNGC4tRxBBUY97/BTXCCXstk+0MIt1tQqX1rg8Bx1LtCXeRPbMdAiv2Q3dQaU K5nNXmIVuf4SqR0y3oS4ARyOGeUnbLHZBDevN6gpbsOWe2scZ+Q+PDBBIBjPpuP9qW6v ikbQF1CgMiBrCZuJmcjg49FM+UjXFcoF0C3WwrSi1ph7dpx/fvPmDTo8dO8WFq+ZZEMU Wq0zHzIZhhSJJx5PhU47BpgU/yi0LjaBYn75HGfnR6180BeJLtgf/kTTj3AdliGXkyU4 cD/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=kYw5Jj6gmsJGrO+WksZ+sUE+fk6yaROM2YXR2t8mjkg=; b=PZ7efRDJYeoyyMV7JJ9rzj+u2w0lmTUvcKju0jK5/d95JBWijyuFeWFkCUSrgPoM8x I/lnlPHFPBORiixmLCnAMYkgRnt5plotLqSUW4QIKcQvgIkGMzElFD4AFRLiHwZOegR4 m6DerRX/Dy4yjFnn6/oh4hrx6Z90q6/un5DyPVUda0QCBd+kolKHZkHcZuYYsabY7Esn tU4tkr7ABozYXPUkYU4GUb4H02dZEc1JxenO7aNp4Kr+RP74zw7volTzoJggBXoUc5om tBhWy0BxXq8VC1HpKr1ofZyS/DveRPu1dSBcC/Ed8Z1jTNpDOCKhnWpGHRMOm+lVXPze ZAPQ== X-Gm-Message-State: AKGB3mJRbArsGHaKBe99W038nL9lptJcLqBBW2ES7ePNWnn2mlfl68g9 iCLOCsE9qOoIoFlAwqeKY3c2S4J9 X-Google-Smtp-Source: ACJfBosZ7L4UvdZcqvAaC5jGEFk0WYFTLh3Z7MGY6BncHtgZCTI6oPRcz1Wg9YMGBT+ma8g2z0qDQA== X-Received: by 10.223.184.171 with SMTP id i40mr14001366wrf.124.1513489795210; Sat, 16 Dec 2017 21:49:55 -0800 (PST) Received: from donizetti.lan (dynamic-adsl-78-12-251-125.clienti.tiscali.it. [78.12.251.125]) by smtp.gmail.com with ESMTPSA id 137sm7427748wmp.34.2017.12.16.21.49.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 16 Dec 2017 21:49:54 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Sun, 17 Dec 2017 06:49:53 +0100 Message-Id: <20171217054953.28500-1-pbonzini@redhat.com> X-Mailer: git-send-email 2.14.3 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PATCH] target-ppc: optimize cmp translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dgibson@redhat.com, qemu-ppc@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We know that only one bit (in addition to SO) is going to be set in the condition register, so do two movconds instead of three setconds, three shifts and two ORs. For ppc64-linux-user, the code size reduction is around 5% and the performance improvement slightly less than 10%. For softmmu, the improvement is around 5%. Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- target/ppc/translate.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 998fbed848..0e9e6823a3 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -605,27 +605,22 @@ static opc_handler_t invalid_handler = { static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf) { TCGv t0 = tcg_temp_new(); - TCGv_i32 t1 = tcg_temp_new_i32(); - - tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so); - - tcg_gen_setcond_tl((s ? TCG_COND_LT: TCG_COND_LTU), t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_LT_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + TCGv t1 = tcg_temp_new(); + TCGv_i32 t = tcg_temp_new_i32(); - tcg_gen_setcond_tl((s ? TCG_COND_GT: TCG_COND_GTU), t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_GT_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + tcg_gen_movi_tl(t0, CRF_EQ); + tcg_gen_movi_tl(t1, CRF_LT); + tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU), t0, arg0, arg1, t1, t0); + tcg_gen_movi_tl(t1, CRF_GT); + tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU), t0, arg0, arg1, t1, t0); - tcg_gen_setcond_tl(TCG_COND_EQ, t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_EQ_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + tcg_gen_trunc_tl_i32(t, t0); + tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so); + tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t); tcg_temp_free(t0); - tcg_temp_free_i32(t1); + tcg_temp_free(t1); + tcg_temp_free_i32(t); } static inline void gen_op_cmpi(TCGv arg0, target_ulong arg1, int s, int crf)