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X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [PATCH v1 05/19] include/fpu/softfloat: add some float16 contants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This defines the same set of common constants for float 16 as defined for 32 and 64 bit floats. These are often used by target helper functions. Signed-off-by: Alex Bennée --- include/fpu/softfloat.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 17dfe60dbd..5a9258c57c 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -395,6 +395,13 @@ static inline float16 float16_set_sign(float16 a, int sign) return make_float16((float16_val(a) & 0x7fff) | (sign << 15)); } +#define float16_zero make_float16(0) +#define float16_one make_float16(0x3a00) +#define float16_ln2 make_float16(0x34d1) +#define float16_pi make_float16(0x4448) +#define float16_half make_float16(0x3800) +#define float16_infinity make_float16(0x7a00) + /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/