From patchwork Mon Dec 4 12:55:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 844229 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yr4cs3Ldlz9sNV for ; Mon, 4 Dec 2017 23:56:13 +1100 (AEDT) Received: from localhost ([::1]:42483 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eLqI7-0006JQ-G6 for incoming@patchwork.ozlabs.org; Mon, 04 Dec 2017 07:56:11 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60234) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eLqHN-0006Fx-2p for qemu-devel@nongnu.org; Mon, 04 Dec 2017 07:55:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eLqHJ-0000JB-5N for qemu-devel@nongnu.org; Mon, 04 Dec 2017 07:55:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48154) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eLqHI-0000Ia-VK; Mon, 04 Dec 2017 07:55:21 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F2946C0587EC; Mon, 4 Dec 2017 12:55:19 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-70.ams2.redhat.com [10.36.116.70]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1D0E15EE16; Mon, 4 Dec 2017 12:55:17 +0000 (UTC) From: David Hildenbrand To: qemu-s390x@nongnu.org, qemu-devel@nongnu.org Date: Mon, 4 Dec 2017 13:55:04 +0100 Message-Id: <20171204125505.29203-5-david@redhat.com> In-Reply-To: <20171204125505.29203-1-david@redhat.com> References: <20171204125505.29203-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 04 Dec 2017 12:55:20 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1 for-2.12 4/5] s390x/tcg: indicate value of TODPR in STCKE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Alexander Graf , Christian Borntraeger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We were not yet using the value of the TOD Programmable Register. Signed-off-by: David Hildenbrand Reviewed-by: Thomas Huth --- target/s390x/translate.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 48b031894a..8da8610839 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o) { TCGv_i64 c1 = tcg_temp_new_i64(); TCGv_i64 c2 = tcg_temp_new_i64(); + TCGv_i64 todpr = tcg_temp_new_i64(); gen_helper_stck(c1, cpu_env); + /* 16 bit value store in an uint32_t (only valid bits set) */ + tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr)); /* Shift the 64-bit value into its place as a zero-extended 104-bit value. Note that "bit positions 64-103 are always non-zero so that they compare differently to STCK"; we set @@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o) tcg_gen_shli_i64(c2, c1, 56); tcg_gen_shri_i64(c1, c1, 8); tcg_gen_ori_i64(c2, c2, 0x10000); + tcg_gen_or_i64(c2, c2, todpr); tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s)); tcg_gen_addi_i64(o->in2, o->in2, 8); tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s)); tcg_temp_free_i64(c1); tcg_temp_free_i64(c2); + tcg_temp_free_i64(todpr); /* ??? We don't implement clock states. */ gen_op_movi_cc(s, 0); return NO_EXIT;